| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 369 {ISD::VECTOR_SHUFFLE, MVT::v4i64, 1}, // vblendpd
370 {ISD::VECTOR_SHUFFLE, MVT::v4f64, 1}, // vblendpd
372 {ISD::VECTOR_SHUFFLE, MVT::v8i32, 1}, // vblendps
373 {ISD::VECTOR_SHUFFLE, MVT::v8f32, 1}, // vblendps
377 {ISD::VECTOR_SHUFFLE, MVT::v16i16, 5},
381 {ISD::VECTOR_SHUFFLE, MVT::v32i8, 9}
385 int Idx = CostTableLookup(AVXAltShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second);
392 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
393 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
397 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1}
[all...] |
| X86ISelLowering.cpp | 682 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 346 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
347 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1},
348 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
349 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
351 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
352 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2},
353 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2},
354 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}};
358 int Idx = CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second);
369 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}
[all...] |
| ARMISelLowering.cpp | 120 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
565 setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 289 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
290 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
296 VECTOR_SHUFFLE,
[all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 208 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
|
| LegalizeVectorTypes.cpp | 68 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
606 case ISD::VECTOR_SHUFFLE:
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | 548 case ISD::VECTOR_SHUFFLE: {
[all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 85 case ISD::VECTOR_SHUFFLE:
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 65 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand);
66 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand);
67 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i32, Expand);
68 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16f32, Expand);
[all...] |
| AMDGPUISelLowering.cpp | 352 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
385 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 166 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
|
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 419 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Promote);
420 AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8);
488 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom);
575 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Legal);
606 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Legal);
650 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4f64, Custom);
700 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4f32, Custom);
742 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4i1, Custom);
[all...] |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 274 setOperationAction(ISD::VECTOR_SHUFFLE, Ty, Custom);
378 case ISD::VECTOR_SHUFFLE: return lowerVECTOR_SHUFFLE(Op, DAG);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 652 setOperationAction(ISD::VECTOR_SHUFFLE, VT.getSimpleVT(), Custom);
[all...] |
