| /external/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.cpp | 43 const TargetRegisterClass *
44 ThumbRegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,
54 const TargetRegisterClass *
447 MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC,
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| ARMISelLowering.h | 333 std::pair<unsigned, const TargetRegisterClass *>
358 const TargetRegisterClass *getRegClassFor(MVT VT) const override;
422 std::pair<const TargetRegisterClass *, uint8_t>
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| ARMBaseInstrInfo.h | 173 const TargetRegisterClass *RC,
179 const TargetRegisterClass *RC,
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 100 std::pair<unsigned, const TargetRegisterClass *>
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| MSP430InstrInfo.cpp | 40 const TargetRegisterClass *RC,
68 const TargetRegisterClass *RC,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
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| /external/llvm/include/llvm/CodeGen/ |
| MachineFunction.h | 43 class TargetRegisterClass;
328 unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC);
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| LiveIntervalAnalysis.h | 49 class TargetRegisterClass;
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 104 const TargetRegisterClass*,
105 const TargetRegisterClass*,
389 const TargetRegisterClass *DestRC,
390 const TargetRegisterClass *SrcRC,
582 const TargetRegisterClass *RC =
584 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC);
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| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 42 const TargetRegisterClass*
285 bool TargetInstrInfo::getStackSlotRange(const TargetRegisterClass *RC,
343 static const TargetRegisterClass *canFoldCopy(const MachineInstr *MI,
363 const TargetRegisterClass *RC = MRI.getRegClass(FoldReg);
423 const TargetRegisterClass *RC =
496 const TargetRegisterClass *RC = canFoldCopy(MI, Ops[0]);
[all...] |
| MachineInstr.cpp | [all...] |
| RegAllocFast.cpp | 167 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
201 int RAFast::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
287 const TargetRegisterClass *RC = MRI->getRegClass(LRI->VirtReg);
523 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
633 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
[all...] |
| PostRASchedulerList.cpp | 142 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs);
198 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs)
278 SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs;
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| TargetLoweringBase.cpp | 785 memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*));
[all...] |
| VirtRegMap.cpp | 77 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) {
106 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
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| AggressiveAntiDepBreaker.cpp | 387 const TargetRegisterClass *RC = nullptr;
471 const TargetRegisterClass *RC = nullptr;
520 const TargetRegisterClass *RC = Q->second.RC;
613 const TargetRegisterClass *SuperRC =
[all...] |
| CallingConvLower.cpp | 243 const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
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| PrologEpilogInserter.cpp | 335 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
356 // the TargetRegisterClass if the stack alignment is smaller. Use the
404 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
432 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 128 const TargetRegisterClass *RC);
334 const TargetRegisterClass *RC = nullptr;
584 const TargetRegisterClass *RC = nullptr;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64AsmPrinter.cpp | 94 const TargetRegisterClass *RC, bool isVector,
238 const TargetRegisterClass *RC,
285 const TargetRegisterClass *RC;
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| AArch64FastISel.cpp | 343 const TargetRegisterClass *RC = (VT == MVT::i64) ? &AArch64::GPR64RegClass
376 const TargetRegisterClass *RC = Is64Bit ?
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 352 const TargetRegisterClass *RC,
390 const TargetRegisterClass *RC,
436 const TargetRegisterClass *PtrRC =
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| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 372 const TargetRegisterClass *RC,
395 const TargetRegisterClass *RC,
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 206 std::pair<unsigned, const TargetRegisterClass *>
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| HexagonPeephole.cpp | 248 const TargetRegisterClass *RC0 = MRI->getRegClass(Reg0);
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