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    Searched refs:TargetRegisterInfo (Results 201 - 225 of 250) sorted by null

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  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 411 const TargetRegisterInfo *TRI) const {
447 const TargetRegisterInfo *TRI) const{
XCoreISelLowering.cpp 811 const TargetRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
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  /external/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp 117 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
732 const TargetRegisterInfo *TRI = &getRegisterInfo();
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PPCISelLowering.h 511 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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  /external/llvm/lib/CodeGen/
MachineScheduler.cpp     [all...]
ExecutionDepsFix.cpp 139 const TargetRegisterInfo *TRI;
PHIElimination.cpp 365 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
BranchFolding.cpp 38 #include "llvm/Target/TargetRegisterInfo.h"
191 const TargetRegisterInfo *tri,
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TargetLoweringBase.cpp 36 #include "llvm/Target/TargetRegisterInfo.h"
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  /external/llvm/include/llvm/CodeGen/
LiveInterval.h 37 class TargetRegisterInfo;
594 /// (@sa TargetRegisterInfo::getSubRegIndexLaneMask()).
MachineBasicBlock.h 635 LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
MachineScheduler.h 827 const TargetRegisterInfo *TRI;
  /external/llvm/lib/Target/AArch64/
AArch64A57FPLoadBalancing.cpp 117 const TargetRegisterInfo *TRI;
AArch64AsmPrinter.cpp 192 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
AArch64ISelLowering.h 474 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
  /external/llvm/lib/Target/ARM/
ThumbRegisterInfo.cpp 10 // This file contains the Thumb-1 implementation of the TargetRegisterInfo
481 TargetRegisterInfo::isVirtualRegister(MO.getReg()))
ARMLoadStoreOptimizer.cpp 44 #include "llvm/Target/TargetRegisterInfo.h"
70 const TargetRegisterInfo *TRI;
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  /external/llvm/lib/Target/Mips/
MipsISelLowering.h 495 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
  /external/llvm/lib/Target/R600/
SIRegisterInfo.cpp 11 /// \brief SI implementation of the TargetRegisterInfo class.
347 assert(!TargetRegisterInfo::isVirtualRegister(Reg));
R600InstrInfo.cpp 86 if (I->isReg() && !TargetRegisterInfo::isVirtualRegister(I->getReg()) &&
249 TargetRegisterInfo::isVirtualRegister(I->getReg()))
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  /external/mesa3d/src/gallium/drivers/radeon/
R600ISelLowering.cpp 110 assert(TargetRegisterInfo::isVirtualRegister(maskedRegister));
  /external/llvm/lib/Target/X86/
X86InstrInfo.cpp     [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.cpp 487 const TargetRegisterInfo *TRI) const {
534 const TargetRegisterInfo *TRI) const {
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HexagonVLIWPacketizer.cpp 47 #include "llvm/Target/TargetRegisterInfo.h"
391 const TargetRegisterInfo *TRI) {
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  /external/llvm/lib/CodeGen/AsmPrinter/
DwarfCompileUnit.cpp 13 #include "llvm/Target/TargetRegisterInfo.h"
289 const TargetRegisterInfo *RI = Asm->MF->getSubtarget().getRegisterInfo();

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