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      1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains the entry points for global functions defined in
     11 // the LLVM NVPTX back-end.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
     16 #define LLVM_LIB_TARGET_NVPTX_NVPTX_H
     17 
     18 #include "MCTargetDesc/NVPTXBaseInfo.h"
     19 #include "llvm/ADT/StringMap.h"
     20 #include "llvm/IR/Module.h"
     21 #include "llvm/IR/Value.h"
     22 #include "llvm/Support/ErrorHandling.h"
     23 #include "llvm/Target/TargetMachine.h"
     24 #include <cassert>
     25 #include <iosfwd>
     26 
     27 namespace llvm {
     28 class NVPTXTargetMachine;
     29 class FunctionPass;
     30 class MachineFunctionPass;
     31 class formatted_raw_ostream;
     32 
     33 namespace NVPTXCC {
     34 enum CondCodes {
     35   EQ,
     36   NE,
     37   LT,
     38   LE,
     39   GT,
     40   GE
     41 };
     42 }
     43 
     44 inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
     45   switch (CC) {
     46   case NVPTXCC::NE:
     47     return "ne";
     48   case NVPTXCC::EQ:
     49     return "eq";
     50   case NVPTXCC::LT:
     51     return "lt";
     52   case NVPTXCC::LE:
     53     return "le";
     54   case NVPTXCC::GT:
     55     return "gt";
     56   case NVPTXCC::GE:
     57     return "ge";
     58   }
     59   llvm_unreachable("Unknown condition code");
     60 }
     61 
     62 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
     63                                  llvm::CodeGenOpt::Level OptLevel);
     64 ModulePass *createNVPTXAssignValidGlobalNamesPass();
     65 ModulePass *createGenericToNVVMPass();
     66 FunctionPass *createNVPTXFavorNonGenericAddrSpacesPass();
     67 ModulePass *createNVVMReflectPass();
     68 ModulePass *createNVVMReflectPass(const StringMap<int>& Mapping);
     69 MachineFunctionPass *createNVPTXPrologEpilogPass();
     70 MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
     71 FunctionPass *createNVPTXImageOptimizerPass();
     72 FunctionPass *createNVPTXLowerStructArgsPass();
     73 
     74 bool isImageOrSamplerVal(const Value *, const Module *);
     75 
     76 extern Target TheNVPTXTarget32;
     77 extern Target TheNVPTXTarget64;
     78 
     79 namespace NVPTX {
     80 enum DrvInterface {
     81   NVCL,
     82   CUDA
     83 };
     84 
     85 // A field inside TSFlags needs a shift and a mask. The usage is
     86 // always as follows :
     87 // ((TSFlags & fieldMask) >> fieldShift)
     88 // The enum keeps the mask, the shift, and all valid values of the
     89 // field in one place.
     90 enum VecInstType {
     91   VecInstTypeShift = 0,
     92   VecInstTypeMask = 0xF,
     93 
     94   VecNOP = 0,
     95   VecLoad = 1,
     96   VecStore = 2,
     97   VecBuild = 3,
     98   VecShuffle = 4,
     99   VecExtract = 5,
    100   VecInsert = 6,
    101   VecDest = 7,
    102   VecOther = 15
    103 };
    104 
    105 enum SimpleMove {
    106   SimpleMoveMask = 0x10,
    107   SimpleMoveShift = 4
    108 };
    109 enum LoadStore {
    110   isLoadMask = 0x20,
    111   isLoadShift = 5,
    112   isStoreMask = 0x40,
    113   isStoreShift = 6
    114 };
    115 
    116 namespace PTXLdStInstCode {
    117 enum AddressSpace {
    118   GENERIC = 0,
    119   GLOBAL = 1,
    120   CONSTANT = 2,
    121   SHARED = 3,
    122   PARAM = 4,
    123   LOCAL = 5
    124 };
    125 enum FromType {
    126   Unsigned = 0,
    127   Signed,
    128   Float
    129 };
    130 enum VecType {
    131   Scalar = 1,
    132   V2 = 2,
    133   V4 = 4
    134 };
    135 }
    136 
    137 /// PTXCvtMode - Conversion code enumeration
    138 namespace PTXCvtMode {
    139 enum CvtMode {
    140   NONE = 0,
    141   RNI,
    142   RZI,
    143   RMI,
    144   RPI,
    145   RN,
    146   RZ,
    147   RM,
    148   RP,
    149 
    150   BASE_MASK = 0x0F,
    151   FTZ_FLAG = 0x10,
    152   SAT_FLAG = 0x20
    153 };
    154 }
    155 
    156 /// PTXCmpMode - Comparison mode enumeration
    157 namespace PTXCmpMode {
    158 enum CmpMode {
    159   EQ = 0,
    160   NE,
    161   LT,
    162   LE,
    163   GT,
    164   GE,
    165   LO,
    166   LS,
    167   HI,
    168   HS,
    169   EQU,
    170   NEU,
    171   LTU,
    172   LEU,
    173   GTU,
    174   GEU,
    175   NUM,
    176   // NAN is a MACRO
    177   NotANumber,
    178 
    179   BASE_MASK = 0xFF,
    180   FTZ_FLAG = 0x100
    181 };
    182 }
    183 }
    184 } // end namespace llvm;
    185 
    186 // Defines symbolic names for NVPTX registers.  This defines a mapping from
    187 // register name to register number.
    188 #define GET_REGINFO_ENUM
    189 #include "NVPTXGenRegisterInfo.inc"
    190 
    191 // Defines symbolic names for the NVPTX instructions.
    192 #define GET_INSTRINFO_ENUM
    193 #include "NVPTXGenInstrInfo.inc"
    194 
    195 #endif
    196