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      1 /*
      2  * Copyright 2011 Christoph Bumiller
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice shall be included in
     12  * all copies or substantial portions of the Software.
     13  *
     14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
     19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     20  * SOFTWARE.
     21  */
     22 
     23 #ifndef __NV50_IR_DRIVER_H__
     24 #define __NV50_IR_DRIVER_H__
     25 
     26 #include "pipe/p_shader_tokens.h"
     27 
     28 #include "tgsi/tgsi_util.h"
     29 #include "tgsi/tgsi_parse.h"
     30 #include "tgsi/tgsi_scan.h"
     31 
     32 /*
     33  * This struct constitutes linkage information in TGSI terminology.
     34  *
     35  * It is created by the code generator and handed to the pipe driver
     36  * for input/output slot assignment.
     37  */
     38 struct nv50_ir_varying
     39 {
     40    uint8_t slot[4]; /* native slots for xyzw (addresses in 32-bit words) */
     41 
     42    unsigned mask     : 4; /* vec4 mask */
     43    unsigned linear   : 1; /* linearly interpolated if true (and not flat) */
     44    unsigned flat     : 1;
     45    unsigned sc       : 1; /* special colour interpolation mode (SHADE_MODEL) */
     46    unsigned centroid : 1;
     47    unsigned patch    : 1; /* patch constant value */
     48    unsigned regular  : 1; /* driver-specific meaning (e.g. input in sreg) */
     49    unsigned input    : 1; /* indicates direction of system values */
     50    unsigned oread    : 1; /* true if output is read from parallel TCP */
     51 
     52    ubyte id; /* TGSI register index */
     53    ubyte sn; /* TGSI semantic name */
     54    ubyte si; /* TGSI semantic index */
     55 };
     56 
     57 #define NV50_PROGRAM_IR_TGSI 0
     58 #define NV50_PROGRAM_IR_SM4  1
     59 #define NV50_PROGRAM_IR_GLSL 2
     60 #define NV50_PROGRAM_IR_LLVM 3
     61 
     62 #ifdef DEBUG
     63 # define NV50_IR_DEBUG_BASIC     (1 << 0)
     64 # define NV50_IR_DEBUG_VERBOSE   (2 << 0)
     65 # define NV50_IR_DEBUG_REG_ALLOC (1 << 2)
     66 #else
     67 # define NV50_IR_DEBUG_BASIC     0
     68 # define NV50_IR_DEBUG_VERBOSE   0
     69 # define NV50_IR_DEBUG_REG_ALLOC 0
     70 #endif
     71 
     72 #define NV50_SEMANTIC_CLIPDISTANCE  (TGSI_SEMANTIC_COUNT + 0)
     73 #define NV50_SEMANTIC_TEXCOORD      (TGSI_SEMANTIC_COUNT + 1)
     74 #define NV50_SEMANTIC_POINTCOORD    (TGSI_SEMANTIC_COUNT + 2)
     75 #define NV50_SEMANTIC_VIEWPORTINDEX (TGSI_SEMANTIC_COUNT + 4)
     76 #define NV50_SEMANTIC_LAYER         (TGSI_SEMANTIC_COUNT + 5)
     77 #define NV50_SEMANTIC_INVOCATIONID  (TGSI_SEMANTIC_COUNT + 6)
     78 #define NV50_SEMANTIC_TESSFACTOR    (TGSI_SEMANTIC_COUNT + 7)
     79 #define NV50_SEMANTIC_TESSCOORD     (TGSI_SEMANTIC_COUNT + 8)
     80 #define NV50_SEMANTIC_SAMPLEMASK    (TGSI_SEMANTIC_COUNT + 9)
     81 #define NV50_SEMANTIC_COUNT         (TGSI_SEMANTIC_COUNT + 10)
     82 
     83 #define NV50_TESS_PART_FRACT_ODD  0
     84 #define NV50_TESS_PART_FRACT_EVEN 1
     85 #define NV50_TESS_PART_POW2       2
     86 #define NV50_TESS_PART_INTEGER    3
     87 
     88 #define NV50_PRIM_PATCHES PIPE_PRIM_MAX
     89 
     90 struct nv50_ir_prog_symbol
     91 {
     92    uint32_t label;
     93    uint32_t offset;
     94 };
     95 
     96 struct nv50_ir_prog_info
     97 {
     98    uint16_t target; /* chipset (0x50, 0x84, 0xc0, ...) */
     99 
    100    uint8_t type; /* PIPE_SHADER */
    101 
    102    uint8_t optLevel; /* optimization level (0 to 3) */
    103    uint8_t dbgFlags;
    104 
    105    struct {
    106       int16_t maxGPR;     /* may be -1 if none used */
    107       int16_t maxOutput;
    108       uint32_t tlsSpace;  /* required local memory per thread */
    109       uint32_t *code;
    110       uint32_t codeSize;
    111       uint8_t sourceRep;  /* NV50_PROGRAM_IR */
    112       const void *source;
    113       void *relocData;
    114       struct nv50_ir_prog_symbol *syms;
    115       uint16_t numSyms;
    116    } bin;
    117 
    118    struct nv50_ir_varying sv[PIPE_MAX_SHADER_INPUTS];
    119    struct nv50_ir_varying in[PIPE_MAX_SHADER_INPUTS];
    120    struct nv50_ir_varying out[PIPE_MAX_SHADER_OUTPUTS];
    121    uint8_t numInputs;
    122    uint8_t numOutputs;
    123    uint8_t numPatchConstants; /* also included in numInputs/numOutputs */
    124    uint8_t numSysVals;
    125 
    126    struct {
    127       uint32_t *buf;    /* for IMMEDIATE_ARRAY */
    128       uint16_t bufSize; /* size of immediate array */
    129       uint16_t count;   /* count of inline immediates */
    130       uint32_t *data;   /* inline immediate data */
    131       uint8_t *type;    /* for each vec4 (128 bit) */
    132    } immd;
    133 
    134    union {
    135       struct {
    136          uint32_t inputMask[4]; /* mask of attributes read (1 bit per scalar) */
    137       } vp;
    138       struct {
    139          uint8_t inputPatchSize;
    140          uint8_t outputPatchSize;
    141          uint8_t partitioning;    /* PIPE_TESS_PART */
    142          int8_t winding;          /* +1 (clockwise) / -1 (counter-clockwise) */
    143          uint8_t domain;          /* PIPE_PRIM_{QUADS,TRIANGLES,LINES} */
    144          uint8_t outputPrim;      /* PIPE_PRIM_{TRIANGLES,LINES,POINTS} */
    145       } tp;
    146       struct {
    147          uint8_t inputPrim;
    148          uint8_t outputPrim;
    149          unsigned instanceCount;
    150          unsigned maxVertices;
    151       } gp;
    152       struct {
    153          unsigned numColourResults;
    154          boolean writesDepth;
    155          boolean earlyFragTests;
    156          boolean separateFragData;
    157          boolean usesDiscard;
    158       } fp;
    159    } prop;
    160 
    161    struct {
    162       uint8_t clipDistance;      /* index of first clip distance output */
    163       uint8_t clipDistanceMask;  /* mask of clip distances defined */
    164       uint8_t cullDistanceMask;  /* clip distance mode (1 bit per output) */
    165       int8_t genUserClip;        /* request user clip planes for ClipVertex */
    166       uint16_t ucpBase;          /* base address for UCPs */
    167       uint8_t ucpBinding;        /* constant buffer index of UCP data */
    168       uint8_t pointSize;         /* output index for PointSize */
    169       uint8_t instanceId;        /* system value index of InstanceID */
    170       uint8_t vertexId;          /* system value index of VertexID */
    171       uint8_t edgeFlagIn;
    172       uint8_t edgeFlagOut;
    173       uint8_t fragDepth;         /* output index of FragDepth */
    174       uint8_t sampleMask;        /* output index of SampleMask */
    175       uint8_t backFaceColor[2];  /* input/output indices of back face colour */
    176       uint8_t globalAccess;      /* 1 for read, 2 for wr, 3 for rw */
    177    } io;
    178 
    179    /* driver callback to assign input/output locations */
    180    int (*assignSlots)(struct nv50_ir_prog_info *);
    181 
    182    void *driverPriv;
    183 };
    184 
    185 #ifdef __cplusplus
    186 extern "C" {
    187 #endif
    188 
    189 extern int nv50_ir_generate_code(struct nv50_ir_prog_info *);
    190 
    191 extern void nv50_ir_relocate_code(void *relocData, uint32_t *code,
    192                                   uint32_t codePos,
    193                                   uint32_t libPos,
    194                                   uint32_t dataPos);
    195 
    196 /* obtain code that will be shared among programs */
    197 extern void nv50_ir_get_target_library(uint32_t chipset,
    198                                        const uint32_t **code, uint32_t *size);
    199 
    200 #ifdef __cplusplus
    201 }
    202 #endif
    203 
    204 #endif // __NV50_IR_DRIVER_H__
    205