1 2 /*---------------------------------------------------------------*/ 3 /*--- begin Tilegx disassembler tilegx-disasm.h ---*/ 4 /*---------------------------------------------------------------*/ 5 6 /* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright Tilera Corp. 2010-2013 11 12 This program is free software; you can redistribute it and/or 13 modify it under the terms of the GNU General Public License as 14 published by the Free Software Foundation; either version 2 of the 15 License, or (at your option) any later version. 16 17 This program is distributed in the hope that it will be useful, but 18 WITHOUT ANY WARRANTY; without even the implied warranty of 19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 General Public License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software 24 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 25 02110-1301, USA. 26 27 The GNU General Public License is contained in the file COPYING. 28 */ 29 30 /* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */ 31 32 #ifndef __TILEGX_DISASM_H 33 #define __TILEGX_DISASM_H 34 35 #include "libvex_basictypes.h" 36 37 typedef ULong tilegx_bundle_bits; 38 39 /* These are the bits that determine if a bundle is in the X encoding. */ 40 #define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) 41 42 enum 43 { 44 /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ 45 TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, 46 47 /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ 48 TILEGX_NUM_PIPELINE_ENCODINGS = 5, 49 50 /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ 51 TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, 52 53 /* Instructions take this many bytes. */ 54 TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, 55 56 /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ 57 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, 58 59 /* Bundles should be aligned modulo this number of bytes. */ 60 TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = 61 (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), 62 63 /* Number of registers (some are magic, such as network I/O). */ 64 TILEGX_NUM_REGISTERS = 64, 65 }; 66 67 /* Make a few "tile_" variables to simplify common code between 68 architectures. */ 69 70 typedef tilegx_bundle_bits tile_bundle_bits; 71 #define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES 72 #define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES 73 #define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ 74 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES 75 76 /* 64-bit pattern for a { bpt ; nop } bundle. */ 77 #define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL 78 79 static __inline UInt 80 get_BFEnd_X0(tilegx_bundle_bits num) 81 { 82 const UInt n = (UInt)num; 83 return (((n >> 12)) & 0x3f); 84 } 85 86 static __inline UInt 87 get_BFOpcodeExtension_X0(tilegx_bundle_bits num) 88 { 89 const UInt n = (UInt)num; 90 return (((n >> 24)) & 0xf); 91 } 92 93 static __inline UInt 94 get_BFStart_X0(tilegx_bundle_bits num) 95 { 96 const UInt n = (UInt)num; 97 return (((n >> 18)) & 0x3f); 98 } 99 100 static __inline UInt 101 get_BrOff_X1(tilegx_bundle_bits n) 102 { 103 return (((UInt)(n >> 31)) & 0x0000003f) | 104 (((UInt)(n >> 37)) & 0x0001ffc0); 105 } 106 107 static __inline UInt 108 get_BrType_X1(tilegx_bundle_bits n) 109 { 110 return (((UInt)(n >> 54)) & 0x1f); 111 } 112 113 static __inline UInt 114 get_Dest_Imm8_X1(tilegx_bundle_bits n) 115 { 116 return (((UInt)(n >> 31)) & 0x0000003f) | 117 (((UInt)(n >> 43)) & 0x000000c0); 118 } 119 120 static __inline UInt 121 get_Dest_X0(tilegx_bundle_bits num) 122 { 123 const UInt n = (UInt)num; 124 return (((n >> 0)) & 0x3f); 125 } 126 127 static __inline UInt 128 get_Dest_X1(tilegx_bundle_bits n) 129 { 130 return (((UInt)(n >> 31)) & 0x3f); 131 } 132 133 static __inline UInt 134 get_Dest_Y0(tilegx_bundle_bits num) 135 { 136 const UInt n = (UInt)num; 137 return (((n >> 0)) & 0x3f); 138 } 139 140 static __inline UInt 141 get_Dest_Y1(tilegx_bundle_bits n) 142 { 143 return (((UInt)(n >> 31)) & 0x3f); 144 } 145 146 static __inline UInt 147 get_Imm16_X0(tilegx_bundle_bits num) 148 { 149 const UInt n = (UInt)num; 150 return (((n >> 12)) & 0xffff); 151 } 152 153 static __inline UInt 154 get_Imm16_X1(tilegx_bundle_bits n) 155 { 156 return (((UInt)(n >> 43)) & 0xffff); 157 } 158 159 static __inline UInt 160 get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) 161 { 162 const UInt n = (UInt)num; 163 return (((n >> 20)) & 0xff); 164 } 165 166 static __inline UInt 167 get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) 168 { 169 return (((UInt)(n >> 51)) & 0xff); 170 } 171 172 static __inline UInt 173 get_Imm8_X0(tilegx_bundle_bits num) 174 { 175 const UInt n = (UInt)num; 176 return (((n >> 12)) & 0xff); 177 } 178 179 static __inline UInt 180 get_Imm8_X1(tilegx_bundle_bits n) 181 { 182 return (((UInt)(n >> 43)) & 0xff); 183 } 184 185 static __inline UInt 186 get_Imm8_Y0(tilegx_bundle_bits num) 187 { 188 const UInt n = (UInt)num; 189 return (((n >> 12)) & 0xff); 190 } 191 192 static __inline UInt 193 get_Imm8_Y1(tilegx_bundle_bits n) 194 { 195 return (((UInt)(n >> 43)) & 0xff); 196 } 197 198 static __inline UInt 199 get_JumpOff_X1(tilegx_bundle_bits n) 200 { 201 return (((UInt)(n >> 31)) & 0x7ffffff); 202 } 203 204 static __inline UInt 205 get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) 206 { 207 return (((UInt)(n >> 58)) & 0x1); 208 } 209 210 static __inline UInt 211 get_MF_Imm14_X1(tilegx_bundle_bits n) 212 { 213 return (((UInt)(n >> 37)) & 0x3fff); 214 } 215 216 static __inline UInt 217 get_MT_Imm14_X1(tilegx_bundle_bits n) 218 { 219 return (((UInt)(n >> 31)) & 0x0000003f) | 220 (((UInt)(n >> 37)) & 0x00003fc0); 221 } 222 223 static __inline UInt 224 get_Mode(tilegx_bundle_bits n) 225 { 226 return (((UInt)(n >> 62)) & 0x3); 227 } 228 229 static __inline UInt 230 get_Opcode_X0(tilegx_bundle_bits num) 231 { 232 const UInt n = (UInt)num; 233 return (((n >> 28)) & 0x7); 234 } 235 236 static __inline UInt 237 get_Opcode_X1(tilegx_bundle_bits n) 238 { 239 return (((UInt)(n >> 59)) & 0x7); 240 } 241 242 static __inline UInt 243 get_Opcode_Y0(tilegx_bundle_bits num) 244 { 245 const UInt n = (UInt)num; 246 return (((n >> 27)) & 0xf); 247 } 248 249 static __inline UInt 250 get_Opcode_Y1(tilegx_bundle_bits n) 251 { 252 return (((UInt)(n >> 58)) & 0xf); 253 } 254 255 static __inline UInt 256 get_Opcode_Y2(tilegx_bundle_bits n) 257 { 258 return (((n >> 26)) & 0x00000001) | 259 (((UInt)(n >> 56)) & 0x00000002); 260 } 261 262 static __inline UInt 263 get_RRROpcodeExtension_X0(tilegx_bundle_bits num) 264 { 265 const UInt n = (UInt)num; 266 return (((n >> 18)) & 0x3ff); 267 } 268 269 static __inline UInt 270 get_RRROpcodeExtension_X1(tilegx_bundle_bits n) 271 { 272 return (((UInt)(n >> 49)) & 0x3ff); 273 } 274 275 static __inline UInt 276 get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) 277 { 278 const UInt n = (UInt)num; 279 return (((n >> 18)) & 0x3); 280 } 281 282 static __inline UInt 283 get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) 284 { 285 return (((UInt)(n >> 49)) & 0x3); 286 } 287 288 static __inline UInt 289 get_ShAmt_X0(tilegx_bundle_bits num) 290 { 291 const UInt n = (UInt)num; 292 return (((n >> 12)) & 0x3f); 293 } 294 295 static __inline UInt 296 get_ShAmt_X1(tilegx_bundle_bits n) 297 { 298 return (((UInt)(n >> 43)) & 0x3f); 299 } 300 301 static __inline UInt 302 get_ShAmt_Y0(tilegx_bundle_bits num) 303 { 304 const UInt n = (UInt)num; 305 return (((n >> 12)) & 0x3f); 306 } 307 308 static __inline UInt 309 get_ShAmt_Y1(tilegx_bundle_bits n) 310 { 311 return (((UInt)(n >> 43)) & 0x3f); 312 } 313 314 static __inline UInt 315 get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) 316 { 317 const UInt n = (UInt)num; 318 return (((n >> 18)) & 0x3ff); 319 } 320 321 static __inline UInt 322 get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) 323 { 324 return (((UInt)(n >> 49)) & 0x3ff); 325 } 326 327 static __inline UInt 328 get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) 329 { 330 const UInt n = (UInt)num; 331 return (((n >> 18)) & 0x3); 332 } 333 334 static __inline UInt 335 get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) 336 { 337 return (((UInt)(n >> 49)) & 0x3); 338 } 339 340 static __inline UInt 341 get_SrcA_X0(tilegx_bundle_bits num) 342 { 343 const UInt n = (UInt)num; 344 return (((n >> 6)) & 0x3f); 345 } 346 347 static __inline UInt 348 get_SrcA_X1(tilegx_bundle_bits n) 349 { 350 return (((UInt)(n >> 37)) & 0x3f); 351 } 352 353 static __inline UInt 354 get_SrcA_Y0(tilegx_bundle_bits num) 355 { 356 const UInt n = (UInt)num; 357 return (((n >> 6)) & 0x3f); 358 } 359 360 static __inline UInt 361 get_SrcA_Y1(tilegx_bundle_bits n) 362 { 363 return (((UInt)(n >> 37)) & 0x3f); 364 } 365 366 static __inline UInt 367 get_SrcA_Y2(tilegx_bundle_bits num) 368 { 369 const UInt n = (UInt)num; 370 return (((n >> 20)) & 0x3f); 371 } 372 373 static __inline UInt 374 get_SrcBDest_Y2(tilegx_bundle_bits n) 375 { 376 return (((UInt)(n >> 51)) & 0x3f); 377 } 378 379 static __inline UInt 380 get_SrcB_X0(tilegx_bundle_bits num) 381 { 382 const UInt n = (UInt)num; 383 return (((n >> 12)) & 0x3f); 384 } 385 386 static __inline UInt 387 get_SrcB_X1(tilegx_bundle_bits n) 388 { 389 return (((UInt)(n >> 43)) & 0x3f); 390 } 391 392 static __inline UInt 393 get_SrcB_Y0(tilegx_bundle_bits num) 394 { 395 const UInt n = (UInt)num; 396 return (((n >> 12)) & 0x3f); 397 } 398 399 static __inline UInt 400 get_SrcB_Y1(tilegx_bundle_bits n) 401 { 402 return (((UInt)(n >> 43)) & 0x3f); 403 } 404 405 static __inline UInt 406 get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) 407 { 408 const UInt n = (UInt)num; 409 return (((n >> 12)) & 0x3f); 410 } 411 412 static __inline UInt 413 get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) 414 { 415 return (((UInt)(n >> 43)) & 0x3f); 416 } 417 418 static __inline UInt 419 get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) 420 { 421 const UInt n = (UInt)num; 422 return (((n >> 12)) & 0x3f); 423 } 424 425 static __inline UInt 426 get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) 427 { 428 return (((UInt)(n >> 43)) & 0x3f); 429 } 430 431 432 static __inline int 433 sign_extend(int n, int num_bits) 434 { 435 int shift = (int)(sizeof(int) * 8 - num_bits); 436 return (n << shift) >> shift; 437 } 438 439 440 441 static __inline tilegx_bundle_bits 442 create_BFEnd_X0(int num) 443 { 444 const UInt n = (UInt)num; 445 return ((n & 0x3f) << 12); 446 } 447 448 static __inline tilegx_bundle_bits 449 create_BFOpcodeExtension_X0(int num) 450 { 451 const UInt n = (UInt)num; 452 return ((n & 0xf) << 24); 453 } 454 455 static __inline tilegx_bundle_bits 456 create_BFStart_X0(int num) 457 { 458 const UInt n = (UInt)num; 459 return ((n & 0x3f) << 18); 460 } 461 462 static __inline tilegx_bundle_bits 463 create_BrOff_X1(int num) 464 { 465 const UInt n = (UInt)num; 466 return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | 467 (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); 468 } 469 470 static __inline tilegx_bundle_bits 471 create_BrType_X1(int num) 472 { 473 const UInt n = (UInt)num; 474 return (((tilegx_bundle_bits)(n & 0x1f)) << 54); 475 } 476 477 static __inline tilegx_bundle_bits 478 create_Dest_Imm8_X1(int num) 479 { 480 const UInt n = (UInt)num; 481 return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | 482 (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); 483 } 484 485 static __inline tilegx_bundle_bits 486 create_Dest_X0(int num) 487 { 488 const UInt n = (UInt)num; 489 return ((n & 0x3f) << 0); 490 } 491 492 static __inline tilegx_bundle_bits 493 create_Dest_X1(int num) 494 { 495 const UInt n = (UInt)num; 496 return (((tilegx_bundle_bits)(n & 0x3f)) << 31); 497 } 498 499 static __inline tilegx_bundle_bits 500 create_Dest_Y0(int num) 501 { 502 const UInt n = (UInt)num; 503 return ((n & 0x3f) << 0); 504 } 505 506 static __inline tilegx_bundle_bits 507 create_Dest_Y1(int num) 508 { 509 const UInt n = (UInt)num; 510 return (((tilegx_bundle_bits)(n & 0x3f)) << 31); 511 } 512 513 static __inline tilegx_bundle_bits 514 create_Imm16_X0(int num) 515 { 516 const UInt n = (UInt)num; 517 return ((n & 0xffff) << 12); 518 } 519 520 static __inline tilegx_bundle_bits 521 create_Imm16_X1(int num) 522 { 523 const UInt n = (UInt)num; 524 return (((tilegx_bundle_bits)(n & 0xffff)) << 43); 525 } 526 527 static __inline tilegx_bundle_bits 528 create_Imm8OpcodeExtension_X0(int num) 529 { 530 const UInt n = (UInt)num; 531 return ((n & 0xff) << 20); 532 } 533 534 static __inline tilegx_bundle_bits 535 create_Imm8OpcodeExtension_X1(int num) 536 { 537 const UInt n = (UInt)num; 538 return (((tilegx_bundle_bits)(n & 0xff)) << 51); 539 } 540 541 static __inline tilegx_bundle_bits 542 create_Imm8_X0(int num) 543 { 544 const UInt n = (UInt)num; 545 return ((n & 0xff) << 12); 546 } 547 548 static __inline tilegx_bundle_bits 549 create_Imm8_X1(int num) 550 { 551 const UInt n = (UInt)num; 552 return (((tilegx_bundle_bits)(n & 0xff)) << 43); 553 } 554 555 static __inline tilegx_bundle_bits 556 create_Imm8_Y0(int num) 557 { 558 const UInt n = (UInt)num; 559 return ((n & 0xff) << 12); 560 } 561 562 static __inline tilegx_bundle_bits 563 create_Imm8_Y1(int num) 564 { 565 const UInt n = (UInt)num; 566 return (((tilegx_bundle_bits)(n & 0xff)) << 43); 567 } 568 569 static __inline tilegx_bundle_bits 570 create_JumpOff_X1(int num) 571 { 572 const UInt n = (UInt)num; 573 return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); 574 } 575 576 static __inline tilegx_bundle_bits 577 create_JumpOpcodeExtension_X1(int num) 578 { 579 const UInt n = (UInt)num; 580 return (((tilegx_bundle_bits)(n & 0x1)) << 58); 581 } 582 583 static __inline tilegx_bundle_bits 584 create_MF_Imm14_X1(int num) 585 { 586 const UInt n = (UInt)num; 587 return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); 588 } 589 590 static __inline tilegx_bundle_bits 591 create_MT_Imm14_X1(int num) 592 { 593 const UInt n = (UInt)num; 594 return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | 595 (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); 596 } 597 598 static __inline tilegx_bundle_bits 599 create_Mode(int num) 600 { 601 const UInt n = (UInt)num; 602 return (((tilegx_bundle_bits)(n & 0x3)) << 62); 603 } 604 605 static __inline tilegx_bundle_bits 606 create_Opcode_X0(int num) 607 { 608 const UInt n = (UInt)num; 609 return ((n & 0x7) << 28); 610 } 611 612 static __inline tilegx_bundle_bits 613 create_Opcode_X1(int num) 614 { 615 const UInt n = (UInt)num; 616 return (((tilegx_bundle_bits)(n & 0x7)) << 59); 617 } 618 619 static __inline tilegx_bundle_bits 620 create_Opcode_Y0(int num) 621 { 622 const UInt n = (UInt)num; 623 return ((n & 0xf) << 27); 624 } 625 626 static __inline tilegx_bundle_bits 627 create_Opcode_Y1(int num) 628 { 629 const UInt n = (UInt)num; 630 return (((tilegx_bundle_bits)(n & 0xf)) << 58); 631 } 632 633 static __inline tilegx_bundle_bits 634 create_Opcode_Y2(int num) 635 { 636 const UInt n = (UInt)num; 637 return ((n & 0x00000001) << 26) | 638 (((tilegx_bundle_bits)(n & 0x00000002)) << 56); 639 } 640 641 static __inline tilegx_bundle_bits 642 create_RRROpcodeExtension_X0(int num) 643 { 644 const UInt n = (UInt)num; 645 return ((n & 0x3ff) << 18); 646 } 647 648 static __inline tilegx_bundle_bits 649 create_RRROpcodeExtension_X1(int num) 650 { 651 const UInt n = (UInt)num; 652 return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); 653 } 654 655 static __inline tilegx_bundle_bits 656 create_RRROpcodeExtension_Y0(int num) 657 { 658 const UInt n = (UInt)num; 659 return ((n & 0x3) << 18); 660 } 661 662 static __inline tilegx_bundle_bits 663 create_RRROpcodeExtension_Y1(int num) 664 { 665 const UInt n = (UInt)num; 666 return (((tilegx_bundle_bits)(n & 0x3)) << 49); 667 } 668 669 static __inline tilegx_bundle_bits 670 create_ShAmt_X0(int num) 671 { 672 const UInt n = (UInt)num; 673 return ((n & 0x3f) << 12); 674 } 675 676 static __inline tilegx_bundle_bits 677 create_ShAmt_X1(int num) 678 { 679 const UInt n = (UInt)num; 680 return (((tilegx_bundle_bits)(n & 0x3f)) << 43); 681 } 682 683 static __inline tilegx_bundle_bits 684 create_ShAmt_Y0(int num) 685 { 686 const UInt n = (UInt)num; 687 return ((n & 0x3f) << 12); 688 } 689 690 static __inline tilegx_bundle_bits 691 create_ShAmt_Y1(int num) 692 { 693 const UInt n = (UInt)num; 694 return (((tilegx_bundle_bits)(n & 0x3f)) << 43); 695 } 696 697 static __inline tilegx_bundle_bits 698 create_ShiftOpcodeExtension_X0(int num) 699 { 700 const UInt n = (UInt)num; 701 return ((n & 0x3ff) << 18); 702 } 703 704 static __inline tilegx_bundle_bits 705 create_ShiftOpcodeExtension_X1(int num) 706 { 707 const UInt n = (UInt)num; 708 return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); 709 } 710 711 static __inline tilegx_bundle_bits 712 create_ShiftOpcodeExtension_Y0(int num) 713 { 714 const UInt n = (UInt)num; 715 return ((n & 0x3) << 18); 716 } 717 718 static __inline tilegx_bundle_bits 719 create_ShiftOpcodeExtension_Y1(int num) 720 { 721 const UInt n = (UInt)num; 722 return (((tilegx_bundle_bits)(n & 0x3)) << 49); 723 } 724 725 static __inline tilegx_bundle_bits 726 create_SrcA_X0(int num) 727 { 728 const UInt n = (UInt)num; 729 return ((n & 0x3f) << 6); 730 } 731 732 static __inline tilegx_bundle_bits 733 create_SrcA_X1(int num) 734 { 735 const UInt n = (UInt)num; 736 return (((tilegx_bundle_bits)(n & 0x3f)) << 37); 737 } 738 739 static __inline tilegx_bundle_bits 740 create_SrcA_Y0(int num) 741 { 742 const UInt n = (UInt)num; 743 return ((n & 0x3f) << 6); 744 } 745 746 static __inline tilegx_bundle_bits 747 create_SrcA_Y1(int num) 748 { 749 const UInt n = (UInt)num; 750 return (((tilegx_bundle_bits)(n & 0x3f)) << 37); 751 } 752 753 static __inline tilegx_bundle_bits 754 create_SrcA_Y2(int num) 755 { 756 const UInt n = (UInt)num; 757 return ((n & 0x3f) << 20); 758 } 759 760 static __inline tilegx_bundle_bits 761 create_SrcBDest_Y2(int num) 762 { 763 const UInt n = (UInt)num; 764 return (((tilegx_bundle_bits)(n & 0x3f)) << 51); 765 } 766 767 static __inline tilegx_bundle_bits 768 create_SrcB_X0(int num) 769 { 770 const UInt n = (UInt)num; 771 return ((n & 0x3f) << 12); 772 } 773 774 static __inline tilegx_bundle_bits 775 create_SrcB_X1(int num) 776 { 777 const UInt n = (UInt)num; 778 return (((tilegx_bundle_bits)(n & 0x3f)) << 43); 779 } 780 781 static __inline tilegx_bundle_bits 782 create_SrcB_Y0(int num) 783 { 784 const UInt n = (UInt)num; 785 return ((n & 0x3f) << 12); 786 } 787 788 static __inline tilegx_bundle_bits 789 create_SrcB_Y1(int num) 790 { 791 const UInt n = (UInt)num; 792 return (((tilegx_bundle_bits)(n & 0x3f)) << 43); 793 } 794 795 static __inline tilegx_bundle_bits 796 create_UnaryOpcodeExtension_X0(int num) 797 { 798 const UInt n = (UInt)num; 799 return ((n & 0x3f) << 12); 800 } 801 802 static __inline tilegx_bundle_bits 803 create_UnaryOpcodeExtension_X1(int num) 804 { 805 const UInt n = (UInt)num; 806 return (((tilegx_bundle_bits)(n & 0x3f)) << 43); 807 } 808 809 static __inline tilegx_bundle_bits 810 create_UnaryOpcodeExtension_Y0(int num) 811 { 812 const UInt n = (UInt)num; 813 return ((n & 0x3f) << 12); 814 } 815 816 static __inline tilegx_bundle_bits 817 create_UnaryOpcodeExtension_Y1(int num) 818 { 819 const UInt n = (UInt)num; 820 return (((tilegx_bundle_bits)(n & 0x3f)) << 43); 821 } 822 823 enum 824 { 825 TILEGX_MAX_OPERANDS = 4 /* bfexts */ 826 }; 827 828 typedef enum 829 { 830 TILEGX_OPC_BPT, 831 TILEGX_OPC_INFO, 832 TILEGX_OPC_INFOL, 833 TILEGX_OPC_LD4S_TLS, 834 TILEGX_OPC_LD_TLS, 835 TILEGX_OPC_MOVE, 836 TILEGX_OPC_MOVEI, 837 TILEGX_OPC_MOVELI, 838 TILEGX_OPC_PREFETCH, 839 TILEGX_OPC_PREFETCH_ADD_L1, 840 TILEGX_OPC_PREFETCH_ADD_L1_FAULT, 841 TILEGX_OPC_PREFETCH_ADD_L2, 842 TILEGX_OPC_PREFETCH_ADD_L2_FAULT, 843 TILEGX_OPC_PREFETCH_ADD_L3, 844 TILEGX_OPC_PREFETCH_ADD_L3_FAULT, 845 TILEGX_OPC_PREFETCH_L1, 846 TILEGX_OPC_PREFETCH_L1_FAULT, 847 TILEGX_OPC_PREFETCH_L2, 848 TILEGX_OPC_PREFETCH_L2_FAULT, 849 TILEGX_OPC_PREFETCH_L3, 850 TILEGX_OPC_PREFETCH_L3_FAULT, 851 TILEGX_OPC_RAISE, 852 TILEGX_OPC_ADD, 853 TILEGX_OPC_ADDI, 854 TILEGX_OPC_ADDLI, 855 TILEGX_OPC_ADDX, 856 TILEGX_OPC_ADDXI, 857 TILEGX_OPC_ADDXLI, 858 TILEGX_OPC_ADDXSC, 859 TILEGX_OPC_AND, 860 TILEGX_OPC_ANDI, 861 TILEGX_OPC_BEQZ, 862 TILEGX_OPC_BEQZT, 863 TILEGX_OPC_BFEXTS, 864 TILEGX_OPC_BFEXTU, 865 TILEGX_OPC_BFINS, 866 TILEGX_OPC_BGEZ, 867 TILEGX_OPC_BGEZT, 868 TILEGX_OPC_BGTZ, 869 TILEGX_OPC_BGTZT, 870 TILEGX_OPC_BLBC, 871 TILEGX_OPC_BLBCT, 872 TILEGX_OPC_BLBS, 873 TILEGX_OPC_BLBST, 874 TILEGX_OPC_BLEZ, 875 TILEGX_OPC_BLEZT, 876 TILEGX_OPC_BLTZ, 877 TILEGX_OPC_BLTZT, 878 TILEGX_OPC_BNEZ, 879 TILEGX_OPC_BNEZT, 880 TILEGX_OPC_CLZ, 881 TILEGX_OPC_CMOVEQZ, 882 TILEGX_OPC_CMOVNEZ, 883 TILEGX_OPC_CMPEQ, 884 TILEGX_OPC_CMPEQI, 885 TILEGX_OPC_CMPEXCH, 886 TILEGX_OPC_CMPEXCH4, 887 TILEGX_OPC_CMPLES, 888 TILEGX_OPC_CMPLEU, 889 TILEGX_OPC_CMPLTS, 890 TILEGX_OPC_CMPLTSI, 891 TILEGX_OPC_CMPLTU, 892 TILEGX_OPC_CMPLTUI, 893 TILEGX_OPC_CMPNE, 894 TILEGX_OPC_CMUL, 895 TILEGX_OPC_CMULA, 896 TILEGX_OPC_CMULAF, 897 TILEGX_OPC_CMULF, 898 TILEGX_OPC_CMULFR, 899 TILEGX_OPC_CMULH, 900 TILEGX_OPC_CMULHR, 901 TILEGX_OPC_CRC32_32, 902 TILEGX_OPC_CRC32_8, 903 TILEGX_OPC_CTZ, 904 TILEGX_OPC_DBLALIGN, 905 TILEGX_OPC_DBLALIGN2, 906 TILEGX_OPC_DBLALIGN4, 907 TILEGX_OPC_DBLALIGN6, 908 TILEGX_OPC_DRAIN, 909 TILEGX_OPC_DTLBPR, 910 TILEGX_OPC_EXCH, 911 TILEGX_OPC_EXCH4, 912 TILEGX_OPC_FDOUBLE_ADD_FLAGS, 913 TILEGX_OPC_FDOUBLE_ADDSUB, 914 TILEGX_OPC_FDOUBLE_MUL_FLAGS, 915 TILEGX_OPC_FDOUBLE_PACK1, 916 TILEGX_OPC_FDOUBLE_PACK2, 917 TILEGX_OPC_FDOUBLE_SUB_FLAGS, 918 TILEGX_OPC_FDOUBLE_UNPACK_MAX, 919 TILEGX_OPC_FDOUBLE_UNPACK_MIN, 920 TILEGX_OPC_FETCHADD, 921 TILEGX_OPC_FETCHADD4, 922 TILEGX_OPC_FETCHADDGEZ, 923 TILEGX_OPC_FETCHADDGEZ4, 924 TILEGX_OPC_FETCHAND, 925 TILEGX_OPC_FETCHAND4, 926 TILEGX_OPC_FETCHOR, 927 TILEGX_OPC_FETCHOR4, 928 TILEGX_OPC_FINV, 929 TILEGX_OPC_FLUSH, 930 TILEGX_OPC_FLUSHWB, 931 TILEGX_OPC_FNOP, 932 TILEGX_OPC_FSINGLE_ADD1, 933 TILEGX_OPC_FSINGLE_ADDSUB2, 934 TILEGX_OPC_FSINGLE_MUL1, 935 TILEGX_OPC_FSINGLE_MUL2, 936 TILEGX_OPC_FSINGLE_PACK1, 937 TILEGX_OPC_FSINGLE_PACK2, 938 TILEGX_OPC_FSINGLE_SUB1, 939 TILEGX_OPC_ICOH, 940 TILEGX_OPC_ILL, 941 TILEGX_OPC_INV, 942 TILEGX_OPC_IRET, 943 TILEGX_OPC_J, 944 TILEGX_OPC_JAL, 945 TILEGX_OPC_JALR, 946 TILEGX_OPC_JALRP, 947 TILEGX_OPC_JR, 948 TILEGX_OPC_JRP, 949 TILEGX_OPC_LD, 950 TILEGX_OPC_LD1S, 951 TILEGX_OPC_LD1S_ADD, 952 TILEGX_OPC_LD1U, 953 TILEGX_OPC_LD1U_ADD, 954 TILEGX_OPC_LD2S, 955 TILEGX_OPC_LD2S_ADD, 956 TILEGX_OPC_LD2U, 957 TILEGX_OPC_LD2U_ADD, 958 TILEGX_OPC_LD4S, 959 TILEGX_OPC_LD4S_ADD, 960 TILEGX_OPC_LD4U, 961 TILEGX_OPC_LD4U_ADD, 962 TILEGX_OPC_LD_ADD, 963 TILEGX_OPC_LDNA, 964 TILEGX_OPC_LDNA_ADD, 965 TILEGX_OPC_LDNT, 966 TILEGX_OPC_LDNT1S, 967 TILEGX_OPC_LDNT1S_ADD, 968 TILEGX_OPC_LDNT1U, 969 TILEGX_OPC_LDNT1U_ADD, 970 TILEGX_OPC_LDNT2S, 971 TILEGX_OPC_LDNT2S_ADD, 972 TILEGX_OPC_LDNT2U, 973 TILEGX_OPC_LDNT2U_ADD, 974 TILEGX_OPC_LDNT4S, 975 TILEGX_OPC_LDNT4S_ADD, 976 TILEGX_OPC_LDNT4U, 977 TILEGX_OPC_LDNT4U_ADD, 978 TILEGX_OPC_LDNT_ADD, 979 TILEGX_OPC_LNK, 980 TILEGX_OPC_MF, 981 TILEGX_OPC_MFSPR, 982 TILEGX_OPC_MM, 983 TILEGX_OPC_MNZ, 984 TILEGX_OPC_MTSPR, 985 TILEGX_OPC_MUL_HS_HS, 986 TILEGX_OPC_MUL_HS_HU, 987 TILEGX_OPC_MUL_HS_LS, 988 TILEGX_OPC_MUL_HS_LU, 989 TILEGX_OPC_MUL_HU_HU, 990 TILEGX_OPC_MUL_HU_LS, 991 TILEGX_OPC_MUL_HU_LU, 992 TILEGX_OPC_MUL_LS_LS, 993 TILEGX_OPC_MUL_LS_LU, 994 TILEGX_OPC_MUL_LU_LU, 995 TILEGX_OPC_MULA_HS_HS, 996 TILEGX_OPC_MULA_HS_HU, 997 TILEGX_OPC_MULA_HS_LS, 998 TILEGX_OPC_MULA_HS_LU, 999 TILEGX_OPC_MULA_HU_HU, 1000 TILEGX_OPC_MULA_HU_LS, 1001 TILEGX_OPC_MULA_HU_LU, 1002 TILEGX_OPC_MULA_LS_LS, 1003 TILEGX_OPC_MULA_LS_LU, 1004 TILEGX_OPC_MULA_LU_LU, 1005 TILEGX_OPC_MULAX, 1006 TILEGX_OPC_MULX, 1007 TILEGX_OPC_MZ, 1008 TILEGX_OPC_NAP, 1009 TILEGX_OPC_NOP, 1010 TILEGX_OPC_NOR, 1011 TILEGX_OPC_OR, 1012 TILEGX_OPC_ORI, 1013 TILEGX_OPC_PCNT, 1014 TILEGX_OPC_REVBITS, 1015 TILEGX_OPC_REVBYTES, 1016 TILEGX_OPC_ROTL, 1017 TILEGX_OPC_ROTLI, 1018 TILEGX_OPC_SHL, 1019 TILEGX_OPC_SHL16INSLI, 1020 TILEGX_OPC_SHL1ADD, 1021 TILEGX_OPC_SHL1ADDX, 1022 TILEGX_OPC_SHL2ADD, 1023 TILEGX_OPC_SHL2ADDX, 1024 TILEGX_OPC_SHL3ADD, 1025 TILEGX_OPC_SHL3ADDX, 1026 TILEGX_OPC_SHLI, 1027 TILEGX_OPC_SHLX, 1028 TILEGX_OPC_SHLXI, 1029 TILEGX_OPC_SHRS, 1030 TILEGX_OPC_SHRSI, 1031 TILEGX_OPC_SHRU, 1032 TILEGX_OPC_SHRUI, 1033 TILEGX_OPC_SHRUX, 1034 TILEGX_OPC_SHRUXI, 1035 TILEGX_OPC_SHUFFLEBYTES, 1036 TILEGX_OPC_ST, 1037 TILEGX_OPC_ST1, 1038 TILEGX_OPC_ST1_ADD, 1039 TILEGX_OPC_ST2, 1040 TILEGX_OPC_ST2_ADD, 1041 TILEGX_OPC_ST4, 1042 TILEGX_OPC_ST4_ADD, 1043 TILEGX_OPC_ST_ADD, 1044 TILEGX_OPC_STNT, 1045 TILEGX_OPC_STNT1, 1046 TILEGX_OPC_STNT1_ADD, 1047 TILEGX_OPC_STNT2, 1048 TILEGX_OPC_STNT2_ADD, 1049 TILEGX_OPC_STNT4, 1050 TILEGX_OPC_STNT4_ADD, 1051 TILEGX_OPC_STNT_ADD, 1052 TILEGX_OPC_SUB, 1053 TILEGX_OPC_SUBX, 1054 TILEGX_OPC_SUBXSC, 1055 TILEGX_OPC_SWINT0, 1056 TILEGX_OPC_SWINT1, 1057 TILEGX_OPC_SWINT2, 1058 TILEGX_OPC_SWINT3, 1059 TILEGX_OPC_TBLIDXB0, 1060 TILEGX_OPC_TBLIDXB1, 1061 TILEGX_OPC_TBLIDXB2, 1062 TILEGX_OPC_TBLIDXB3, 1063 TILEGX_OPC_V1ADD, 1064 TILEGX_OPC_V1ADDI, 1065 TILEGX_OPC_V1ADDUC, 1066 TILEGX_OPC_V1ADIFFU, 1067 TILEGX_OPC_V1AVGU, 1068 TILEGX_OPC_V1CMPEQ, 1069 TILEGX_OPC_V1CMPEQI, 1070 TILEGX_OPC_V1CMPLES, 1071 TILEGX_OPC_V1CMPLEU, 1072 TILEGX_OPC_V1CMPLTS, 1073 TILEGX_OPC_V1CMPLTSI, 1074 TILEGX_OPC_V1CMPLTU, 1075 TILEGX_OPC_V1CMPLTUI, 1076 TILEGX_OPC_V1CMPNE, 1077 TILEGX_OPC_V1DDOTPU, 1078 TILEGX_OPC_V1DDOTPUA, 1079 TILEGX_OPC_V1DDOTPUS, 1080 TILEGX_OPC_V1DDOTPUSA, 1081 TILEGX_OPC_V1DOTP, 1082 TILEGX_OPC_V1DOTPA, 1083 TILEGX_OPC_V1DOTPU, 1084 TILEGX_OPC_V1DOTPUA, 1085 TILEGX_OPC_V1DOTPUS, 1086 TILEGX_OPC_V1DOTPUSA, 1087 TILEGX_OPC_V1INT_H, 1088 TILEGX_OPC_V1INT_L, 1089 TILEGX_OPC_V1MAXU, 1090 TILEGX_OPC_V1MAXUI, 1091 TILEGX_OPC_V1MINU, 1092 TILEGX_OPC_V1MINUI, 1093 TILEGX_OPC_V1MNZ, 1094 TILEGX_OPC_V1MULTU, 1095 TILEGX_OPC_V1MULU, 1096 TILEGX_OPC_V1MULUS, 1097 TILEGX_OPC_V1MZ, 1098 TILEGX_OPC_V1SADAU, 1099 TILEGX_OPC_V1SADU, 1100 TILEGX_OPC_V1SHL, 1101 TILEGX_OPC_V1SHLI, 1102 TILEGX_OPC_V1SHRS, 1103 TILEGX_OPC_V1SHRSI, 1104 TILEGX_OPC_V1SHRU, 1105 TILEGX_OPC_V1SHRUI, 1106 TILEGX_OPC_V1SUB, 1107 TILEGX_OPC_V1SUBUC, 1108 TILEGX_OPC_V2ADD, 1109 TILEGX_OPC_V2ADDI, 1110 TILEGX_OPC_V2ADDSC, 1111 TILEGX_OPC_V2ADIFFS, 1112 TILEGX_OPC_V2AVGS, 1113 TILEGX_OPC_V2CMPEQ, 1114 TILEGX_OPC_V2CMPEQI, 1115 TILEGX_OPC_V2CMPLES, 1116 TILEGX_OPC_V2CMPLEU, 1117 TILEGX_OPC_V2CMPLTS, 1118 TILEGX_OPC_V2CMPLTSI, 1119 TILEGX_OPC_V2CMPLTU, 1120 TILEGX_OPC_V2CMPLTUI, 1121 TILEGX_OPC_V2CMPNE, 1122 TILEGX_OPC_V2DOTP, 1123 TILEGX_OPC_V2DOTPA, 1124 TILEGX_OPC_V2INT_H, 1125 TILEGX_OPC_V2INT_L, 1126 TILEGX_OPC_V2MAXS, 1127 TILEGX_OPC_V2MAXSI, 1128 TILEGX_OPC_V2MINS, 1129 TILEGX_OPC_V2MINSI, 1130 TILEGX_OPC_V2MNZ, 1131 TILEGX_OPC_V2MULFSC, 1132 TILEGX_OPC_V2MULS, 1133 TILEGX_OPC_V2MULTS, 1134 TILEGX_OPC_V2MZ, 1135 TILEGX_OPC_V2PACKH, 1136 TILEGX_OPC_V2PACKL, 1137 TILEGX_OPC_V2PACKUC, 1138 TILEGX_OPC_V2SADAS, 1139 TILEGX_OPC_V2SADAU, 1140 TILEGX_OPC_V2SADS, 1141 TILEGX_OPC_V2SADU, 1142 TILEGX_OPC_V2SHL, 1143 TILEGX_OPC_V2SHLI, 1144 TILEGX_OPC_V2SHLSC, 1145 TILEGX_OPC_V2SHRS, 1146 TILEGX_OPC_V2SHRSI, 1147 TILEGX_OPC_V2SHRU, 1148 TILEGX_OPC_V2SHRUI, 1149 TILEGX_OPC_V2SUB, 1150 TILEGX_OPC_V2SUBSC, 1151 TILEGX_OPC_V4ADD, 1152 TILEGX_OPC_V4ADDSC, 1153 TILEGX_OPC_V4INT_H, 1154 TILEGX_OPC_V4INT_L, 1155 TILEGX_OPC_V4PACKSC, 1156 TILEGX_OPC_V4SHL, 1157 TILEGX_OPC_V4SHLSC, 1158 TILEGX_OPC_V4SHRS, 1159 TILEGX_OPC_V4SHRU, 1160 TILEGX_OPC_V4SUB, 1161 TILEGX_OPC_V4SUBSC, 1162 TILEGX_OPC_WH64, 1163 TILEGX_OPC_XOR, 1164 TILEGX_OPC_XORI, 1165 TILEGX_OPC_NONE 1166 } tilegx_mnemonic; 1167 1168 1169 1170 typedef enum 1171 { 1172 TILEGX_PIPELINE_X0, 1173 TILEGX_PIPELINE_X1, 1174 TILEGX_PIPELINE_Y0, 1175 TILEGX_PIPELINE_Y1, 1176 TILEGX_PIPELINE_Y2, 1177 } tilegx_pipeline; 1178 1179 #define tilegx_is_x_pipeline(p) ((Int)(p) <= (Int)TILEGX_PIPELINE_X1) 1180 1181 typedef enum 1182 { 1183 TILEGX_OP_TYPE_REGISTER, 1184 TILEGX_OP_TYPE_IMMEDIATE, 1185 TILEGX_OP_TYPE_ADDRESS, 1186 TILEGX_OP_TYPE_SPR 1187 } tilegx_operand_type; 1188 1189 struct tilegx_operand 1190 { 1191 /* Is this operand a register, immediate or address? */ 1192 tilegx_operand_type type; 1193 1194 /* The default relocation type for this operand. */ 1195 Int default_reloc : 16; 1196 1197 /* How many bits is this value? (used for range checking) */ 1198 UInt num_bits : 5; 1199 1200 /* Is the value signed? (used for range checking) */ 1201 UInt is_signed : 1; 1202 1203 /* Is this operand a source register? */ 1204 UInt is_src_reg : 1; 1205 1206 /* Is this operand written? (i.e. is it a destination register) */ 1207 UInt is_dest_reg : 1; 1208 1209 /* Is this operand PC-relative? */ 1210 UInt is_pc_relative : 1; 1211 1212 /* By how many bits do we right shift the value before inserting? */ 1213 UInt rightshift : 2; 1214 1215 /* Return the bits for this operand to be ORed into an existing bundle. */ 1216 tilegx_bundle_bits (*insert) (int op); 1217 1218 /* Extract this operand and return it. */ 1219 UInt (*extract) (tilegx_bundle_bits bundle); 1220 }; 1221 1222 1223 extern const struct tilegx_operand tilegx_operands[]; 1224 1225 /* One finite-state machine per pipe for rapid instruction decoding. */ 1226 extern const unsigned short * const 1227 tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; 1228 1229 1230 struct tilegx_opcode 1231 { 1232 /* The opcode mnemonic, e.g. "add" */ 1233 const char *name; 1234 1235 /* The enum value for this mnemonic. */ 1236 tilegx_mnemonic mnemonic; 1237 1238 /* A bit mask of which of the five pipes this instruction 1239 is compatible with: 1240 X0 0x01 1241 X1 0x02 1242 Y0 0x04 1243 Y1 0x08 1244 Y2 0x10 */ 1245 unsigned char pipes; 1246 1247 /* How many operands are there? */ 1248 unsigned char num_operands; 1249 1250 /* Which register does this write implicitly, or TREG_ZERO if none? */ 1251 unsigned char implicitly_written_register; 1252 1253 /* Can this be bundled with other instructions (almost always true). */ 1254 unsigned char can_bundle; 1255 1256 /* The description of the operands. Each of these is an 1257 * index into the tilegx_operands[] table. */ 1258 unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; 1259 1260 /* A mask of which bits have predefined values for each pipeline. 1261 * This is useful for disassembly. */ 1262 tilegx_bundle_bits fixed_bit_masks[TILEGX_NUM_PIPELINE_ENCODINGS]; 1263 1264 /* For each bit set in fixed_bit_masks, what the value is for this 1265 * instruction. */ 1266 tilegx_bundle_bits fixed_bit_values[TILEGX_NUM_PIPELINE_ENCODINGS]; 1267 }; 1268 1269 extern const struct tilegx_opcode tilegx_opcodes[]; 1270 1271 /* Used for non-textual disassembly into structs. */ 1272 struct tilegx_decoded_instruction 1273 { 1274 const struct tilegx_opcode *opcode; 1275 const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; 1276 Long operand_values[TILEGX_MAX_OPERANDS]; 1277 }; 1278 1279 1280 /* Disassemble a bundle into a struct for machine processing. */ 1281 extern Int parse_insn_tilegx ( tilegx_bundle_bits bits, 1282 ULong pc, 1283 struct tilegx_decoded_instruction 1284 decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE] ); 1285 1286 extern Int decode_and_display ( tilegx_bundle_bits *p, Int count, ULong pc ); 1287 1288 extern tilegx_bundle_bits 1289 encode_insn_tilegx ( struct tilegx_decoded_instruction decoded ); 1290 1291 1292 extern tilegx_bundle_bits 1293 mkTileGxInsn ( Int opc, Int argc, ... ); 1294 1295 /* Given a set of bundle bits and a specific pipe, returns which 1296 * instruction the bundle contains in that pipe. 1297 */ 1298 extern const struct tilegx_opcode * 1299 find_opcode ( tilegx_bundle_bits bits, tilegx_pipeline pipe ); 1300 1301 1302 #endif /* __TILEGX_DISASM_H */ 1303 1304 /*---------------------------------------------------------------*/ 1305 /*--- end tilegx-disasm.h ---*/ 1306 /*---------------------------------------------------------------*/ 1307
