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    Searched defs:RegList (Results 1 - 14 of 14) sorted by null

  /external/llvm/lib/Target/AArch64/
AArch64CallingConvention.h 89 ArrayRef<MCPhysReg> RegList;
91 RegList = XRegList;
93 RegList = HRegList;
95 RegList = SRegList;
97 RegList = DRegList;
99 RegList = QRegList;
115 unsigned RegResult = State.AllocateRegBlock(RegList, PendingMembers.size());
127 for (auto Reg : RegList)
  /external/vixl/src/vixl/a64/
assembler-a64.h 39 typedef uint64_t RegList;
40 static const int kRegListSizeInBits = sizeof(RegList) * 8;
82 RegList Bit() const {
83 VIXL_ASSERT(code_ < (sizeof(RegList) * 8));
84 return IsValid() ? (static_cast<RegList>(1) << code_) : 0;
466 CPURegList(CPURegister::RegisterType type, unsigned size, RegList list)
567 RegList list() const {
572 void set_list(RegList new_list) {
631 RegList list_;
    [all...]
  /external/llvm/utils/TableGen/
CallingConvEmitter.cpp 113 ListInit *RegList = Action->getValueAsListInit("RegList");
114 if (RegList->size() == 1) {
116 O << getQualifiedName(RegList->getElementAsRecord(0)) << ")) {\n";
118 O << IndentStr << "static const MCPhysReg RegList" << ++Counter
121 for (unsigned i = 0, e = RegList->size(); i != e; ++i) {
123 O << getQualifiedName(RegList->getElementAsRecord(i));
126 O << IndentStr << "if (unsigned Reg = State.AllocateReg(RegList"
134 ListInit *RegList = Action->getValueAsListInit("RegList");
    [all...]
  /external/llvm/lib/Target/ARM/
ARMCallingConv.h 31 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 };
34 if (unsigned Reg = State.AllocateReg(RegList))
49 if (unsigned Reg = State.AllocateReg(RegList))
206 ArrayRef<MCPhysReg> RegList;
209 RegList = RRegList;
210 unsigned RegIdx = State.getFirstUnallocated(RegList);
215 while (RegIdx % RegAlign != 0 && RegIdx < RegList.size())
216 State.AllocateReg(RegList[RegIdx++]);
221 RegList = SRegList;
224 RegList = DRegList
    [all...]
ARMBaseRegisterInfo.cpp 66 const MCPhysReg *RegList =
90 return RegList;
ARMAsmPrinter.cpp     [all...]
ARMBaseInstrInfo.cpp     [all...]
  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 282 static const MCPhysReg RegList[] = {
285 static const unsigned NbRegs = array_lengthof(RegList);
327 unsigned Reg = State.AllocateReg(RegList);
    [all...]
  /external/v8/src/
frames.h 16 typedef uint64_t RegList;
18 typedef uint32_t RegList;
22 int NumRegs(RegList list);
  /art/compiler/utils/arm/
constants_arm.h 223 typedef uint16_t RegList;
  /external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp 276 static const MCPhysReg RegList[] = {
280 if (unsigned Reg = State.AllocateReg(RegList)) {
    [all...]
  /external/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 56 static const MCPhysReg RegList[] = {
60 if (unsigned Reg = State.AllocateReg(RegList)) {
71 if (unsigned Reg = State.AllocateReg(RegList))
84 static const MCPhysReg RegList[] = {
89 if (unsigned Reg = State.AllocateReg(RegList))
95 if (unsigned Reg = State.AllocateReg(RegList))
    [all...]
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 636 struct RegListOp RegList;
    [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp     [all...]

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