| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 720 ATOMIC_LOAD_SUB,
[all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 68 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
|
| LegalizeIntegerTypes.cpp | 138 case ISD::ATOMIC_LOAD_SUB:
[all...] |
| SelectionDAG.cpp | 492 case ISD::ATOMIC_LOAD_SUB:
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.cpp | 137 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);
|
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 678 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_SUB, SYNC_FETCH_AND_SUB)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.cpp | 278 setTargetDAGCombine(ISD::ATOMIC_LOAD_SUB);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 175 // Lower ATOMIC_LOAD_SUB into ATOMIC_LOAD_ADD if LAA and LAAG are
177 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
208 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 480 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
