| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyCFGStackify.cpp | 73 const MachineLoopInfo &MLI) {
97 assert(MLI.isLoopHeader(Header));
110 const MachineLoopInfo &MLI);
120 const MachineLoopInfo &MLI)
125 MachineLoop *Loop = MLI.getLoopFor(MBB);
130 [=, &MLI](const MachineBasicBlock *A, const MachineBasicBlock *B) {
173 static void SortBlocks(MachineFunction &MF, const MachineLoopInfo &MLI) {
183 Stack.push_back(POStackEntry(EntryBlock, MF, MLI));
191 Stack.push_back(POStackEntry(Succ, MF, MLI));
227 MachineLoop *Loop = MLI.getLoopFor(&MBB)
[all...] |
| /external/llvm/lib/CodeGen/ |
| ShrinkWrap.cpp | 116 MachineLoopInfo *MLI;
166 MLI = &getAnalysis<MachineLoopInfo>();
339 MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
351 (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
352 if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
366 MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
378 if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore)
[all...] |
| DFAPacketizer.cpp | 155 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
163 MachineLoopInfo &MLI,
165 : ScheduleDAGInstrs(MF, &MLI), AA(AA) {
176 MachineLoopInfo &MLI, AliasAnalysis *AA)
180 VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, AA);
|
| MachineBlockFrequencyInfo.cpp | 143 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
146 MBFI->calculate(F, MBPI, MLI);
|
| PHIElimination.cpp | 87 MachineLoopInfo *MLI);
145 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
147 Changed |= SplitPHIEdges(MF, MBB, MLI);
550 MachineLoopInfo *MLI) {
554 const MachineLoop *CurLoop = MLI ? MLI->getLoopFor(&MBB) : nullptr;
571 const MachineLoop *PreLoop = MLI ? MLI->getLoopFor(PreMBB) : nullptr;
|
| UnreachableBlockElim.cpp | 124 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
141 if (MLI) MLI->removeBlock(BB);
|
| CalcSpillWeights.cpp | 29 const MachineLoopInfo &MLI,
36 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm);
|
| PostRASchedulerList.cpp | 139 MachineFunction &MF, MachineLoopInfo &MLI, AliasAnalysis *AA,
195 MachineFunction &MF, MachineLoopInfo &MLI, AliasAnalysis *AA,
199 : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) {
269 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
301 SchedulePostRATDList Scheduler(Fn, MLI, AA, RegClassInfo, AntiDepMode,
|
| MachineBasicBlock.cpp | [all...] |
| MachineLICM.cpp | 82 MachineLoopInfo *MLI; // Current MachineLoopInfo
294 MLI = &getAnalysis<MachineLoopInfo>();
298 SmallVector<MachineLoop *, 8> Worklist(MLI->begin(), MLI->end());
456 const MachineLoop *ML = MLI->getLoopFor(BB);
650 const MachineLoop *ML = MLI->getLoopFor(BB);
[all...] |
| MachineBlockPlacement.cpp | 219 const MachineLoopInfo *MLI;
750 if (MachineLoop *ExitLoop = MLI->getLoopFor(Succ)) {
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 76 const MachineLoopInfo &MLI,
|
| DFAPacketizer.h | 146 VLIWPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
|
| ScheduleDAGInstrs.h | 91 const MachineLoopInfo *MLI;
170 const MachineLoopInfo *mli,
|
| MachineScheduler.h | 103 const MachineLoopInfo *MLI;
259 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA),
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.h | 37 const MachineLoopInfo *MLI;
45 HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
|
| HexagonEarlyIfConv.cpp | 139 TII(0), TRI(0), MFN(0), MRI(0), MDT(0), MLI(0) {
195 MachineLoopInfo *MLI;
210 MachineLoop *L = MLI->getLoopFor(SB);
247 if (MLI->getLoopFor(T1B) != L || MLI->getLoopFor(T2B) != L)
577 if (MLI->getLoopFor(B) != L)
[all...] |
| HexagonVLIWPacketizer.cpp | 104 MachineLoopInfo &MLI, AliasAnalysis *AA,
106 : VLIWPacketizerList(MF, MLI, AA), MBPI(MBPI), MLI(&MLI) {
176 auto &MLI = getAnalysis<MachineLoopInfo>();
184 HexagonPacketizerList Packetizer(MF, MLI, AA, MBPI);
[all...] |
| HexagonHardwareLoops.cpp | 73 MachineLoopInfo *MLI;
352 MLI = &getAnalysis<MachineLoopInfo>();
357 for (auto &L : *MLI)
[all...] |
| HexagonSplitDouble.cpp | 66 const MachineLoopInfo *MLI;
422 const MachineLoop *L = MLI->getLoopFor(PB);
543 for (auto I : *MLI)
[all...] |
| HexagonMachineScheduler.cpp | 148 << " at loop depth " << MLI->getLoopDepth(BB)
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDILCFGStructurizer.cpp | 171 MLI = &getAnalysis<MachineLoopInfo>();
172 DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI););
186 MachineLoopInfo *MLI;
372 MachineLoop *LoopRep = MLI->getLoopFor(MBB);
391 MachineLoop *LoopRep = MLI->getLoopFor(MBB);
759 for (MachineLoopInfo::iterator It = MLI->begin(),
760 E = MLI->end(); It != E; ++It) {
[all...] |
| R600Packetizer.cpp | 151 R600PacketizerList(MachineFunction &MF, MachineLoopInfo &MLI)
152 : VLIWPacketizerList(MF, MLI, nullptr),
332 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
335 R600PacketizerList Packetizer(Fn, MLI);
|
| /external/selinux/policycoreutils/mcstrans/share/examples/nato/setrans.d/ |
| eyes-only.conf | 439 ~c344=MLI # Mali
|
| rel.conf | 445 ~c200,~c344=MLI # Mali
|
