| /cts/tests/tests/graphics/src/android/graphics/cts/ |
| Region_OpTest.java | 20 import android.graphics.Region.Op;
26 assertEquals(Op.DIFFERENCE, Op.valueOf("DIFFERENCE"));
27 assertEquals(Op.INTERSECT, Op.valueOf("INTERSECT"));
28 assertEquals(Op.UNION, Op.valueOf("UNION"));
29 assertEquals(Op.XOR, Op.valueOf("XOR"));
30 assertEquals(Op.REVERSE_DIFFERENCE, Op.valueOf("REVERSE_DIFFERENCE"))
[all...] |
| /external/opencv3/modules/cudev/include/opencv2/cudev/functional/ |
| tuple_adapter.hpp | 57 template <class Op, int n> struct UnaryTupleAdapter
59 typedef typename Op::result_type result_type;
61 Op op; member in struct:cv::cudev::UnaryTupleAdapter
64 __device__ __forceinline__ typename Op::result_type operator ()(const Tuple& t) const
66 return op(get<n>(t));
70 template <int n, class Op>
71 __host__ __device__ UnaryTupleAdapter<Op, n> unaryTupleAdapter(const Op& op)
82 Op op; member in struct:cv::cudev::BinaryTupleAdapter
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 17 const MCOperand &Op = MI->getOperand(OpNo);
18 if (Op.isReg()) {
19 O << getRegisterName(Op.getReg());
20 } else if (Op.isImm()) {
21 O << Op.getImm();
22 } else if (Op.isFPImm()) {
23 O << Op.getFPImm();
|
| /external/opencv3/modules/cudev/include/opencv2/cudev/ptr2d/ |
| transform.hpp | 61 template <class SrcPtr, class Op> struct UnaryTransformPtr
63 typedef typename Op::result_type value_type;
67 Op op; member in struct:cv::cudev::UnaryTransformPtr
69 __device__ __forceinline__ typename Op::result_type operator ()(typename PtrTraits<SrcPtr>::index_type y, typename PtrTraits<SrcPtr>::index_type x) const
71 return op(src(y, x));
75 template <class SrcPtr, class Op> struct UnaryTransformPtrSz : UnaryTransformPtr<SrcPtr, Op>
86 template <class SrcPtr, class Op>
87 __host__ UnaryTransformPtrSz<typename PtrTraits<SrcPtr>::ptr_type, Op>
111 Op op; member in struct:cv::cudev::BinaryTransformPtr
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 580 MachineOperand Op(MachineOperand::MO_Immediate);
581 Op.setImm(Val);
582 return Op;
586 MachineOperand Op(MachineOperand::MO_CImmediate);
587 Op.Contents.CI = CI;
588 return Op;
592 MachineOperand Op(MachineOperand::MO_FPImmediate);
593 Op.Contents.CFP = CFP;
594 return Op;
606 MachineOperand Op(MachineOperand::MO_Register)
[all...] |
| MachineRegisterInfo.h | 762 MachineOperand *Op;
763 explicit defusechain_iterator(MachineOperand *op) : Op(op) {
766 if (op) {
767 if ((!ReturnUses && op->isUse()) ||
768 (!ReturnDefs && op->isDef()) ||
769 (SkipDebug && op->isDebug()))
776 assert(Op && "Cannot increment end iterator!");
777 Op = getNextOperandForReg(Op)
[all...] |
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86ATTInstPrinter.cpp | 72 void X86ATTInstPrinter::printSSEAVXCC(const MCInst *MI, unsigned Op,
74 int64_t Imm = MI->getOperand(Op).getImm();
112 void X86ATTInstPrinter::printXOPCC(const MCInst *MI, unsigned Op,
114 int64_t Imm = MI->getOperand(Op).getImm();
128 void X86ATTInstPrinter::printRoundingControl(const MCInst *MI, unsigned Op,
130 int64_t Imm = MI->getOperand(Op).getImm() & 0x3;
144 const MCOperand &Op = MI->getOperand(OpNo);
145 if (Op.isImm())
146 O << formatImm(Op.getImm());
148 assert(Op.isExpr() && "unknown pcrel immediate operand")
[all...] |
| X86IntelInstPrinter.cpp | 54 void X86IntelInstPrinter::printSSEAVXCC(const MCInst *MI, unsigned Op,
56 int64_t Imm = MI->getOperand(Op).getImm();
94 void X86IntelInstPrinter::printXOPCC(const MCInst *MI, unsigned Op,
96 int64_t Imm = MI->getOperand(Op).getImm();
110 void X86IntelInstPrinter::printRoundingControl(const MCInst *MI, unsigned Op,
112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3;
125 const MCOperand &Op = MI->getOperand(OpNo);
126 if (Op.isImm())
127 O << formatImm(Op.getImm());
129 assert(Op.isExpr() && "unknown pcrel immediate operand")
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 112 MCOperand Op;
113 Op.Kind = kRegister;
114 Op.RegVal = Reg;
115 return Op;
118 MCOperand Op;
119 Op.Kind = kImmediate;
120 Op.ImmVal = Val;
121 return Op;
124 MCOperand Op;
125 Op.Kind = kFPImmediate
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 54 SDValue LegalizeOp(SDValue Op);
57 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
60 SDValue UnrollVSETCC(SDValue Op);
66 SDValue Expand(SDValue Op);
73 SDValue ExpandUINT_TO_FLOAT(SDValue Op);
76 SDValue ExpandSEXTINREG(SDValue Op);
83 SDValue ExpandANY_EXTEND_VECTOR_INREG(SDValue Op);
90 SDValue ExpandSIGN_EXTEND_VECTOR_INREG(SDValue Op);
96 SDValue ExpandZERO_EXTEND_VECTOR_INREG(SDValue Op);
99 SDValue ExpandBSWAP(SDValue Op);
[all...] |
| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.cpp | 37 const MCOperand &Op = MI->getOperand(OpNo);
38 if (Op.isImm())
39 O << Op.getImm();
41 assert(Op.isExpr() && "unknown pcrel immediate operand");
42 Op.getExpr()->print(O, &MAI);
49 const MCOperand &Op = MI->getOperand(OpNo);
50 if (Op.isReg()) {
51 O << getRegisterName(Op.getReg());
52 } else if (Op.isImm()) {
53 O << '#' << Op.getImm()
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
82 switch (Op.getOpcode()) {
84 Op.getNode()->dump();
89 case ISD::SDIV: return LowerSDIV(Op, DAG);
90 case ISD::SREM: return LowerSREM(Op, DAG);
91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
93 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
95 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
96 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG)
[all...] |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
56 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
67 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
84 SDValue LowerSREM(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerSREM8(SDValue Op, SelectionDAG &DAG) const
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
|
| /external/llvm/tools/llvm-cov/ |
| CoverageFilters.h | 60 Operation Op;
63 StatisticThresholdFilter(Operation Op, T Threshold)
64 : Op(Op), Threshold(Threshold) {}
69 switch (Op) {
84 RegionCoverageFilter(Operation Op, double Threshold)
85 : StatisticThresholdFilter(Op, Threshold) {}
95 LineCoverageFilter(Operation Op, double Threshold)
96 : StatisticThresholdFilter(Op, Threshold) {}
|
| /external/llvm/lib/Target/BPF/InstPrinter/ |
| BPFInstPrinter.cpp | 55 const MCOperand &Op = MI->getOperand(OpNo);
56 if (Op.isReg()) {
57 O << getRegisterName(Op.getReg());
58 } else if (Op.isImm()) {
59 O << (int32_t)Op.getImm();
61 assert(Op.isExpr() && "Expected an expression");
62 printExpr(Op.getExpr(), O);
83 const MCOperand &Op = MI->getOperand(OpNo);
84 if (Op.isImm())
85 O << (uint64_t)Op.getImm()
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.h | 36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
42 SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
46 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
48 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const
[all...] |
| R600ISelLowering.h | 29 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
59 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
60 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
61 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
62 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
63 SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
64 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
65 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
66 SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerSHLParts(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 75 const MCOperand &Op = MI->getOperand(OpNo);
76 if (Op.isReg()) {
77 printRegName(O, Op.getReg());
81 if (Op.isImm()) {
82 O << Op.getImm();
86 assert(Op.isExpr() && "unknown operand kind in printOperand");
87 printExpr(Op.getExpr(), &MAI, O);
|
| /external/skia/include/gpu/effects/ |
| GrCoverageSetOpXP.h | 24 static GrXPFactory* Create(SkRegion::Op regionOp, bool invertCoverage = false);
30 GrCoverageSetOpXPFactory(SkRegion::Op regionOp, bool invertCoverage);
50 SkRegion::Op fRegionOp;
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 360 SDValue MipsSETargetLowering::LowerOperation(SDValue Op,
362 switch(Op.getOpcode()) {
363 case ISD::LOAD: return lowerLOAD(Op, DAG);
364 case ISD::STORE: return lowerSTORE(Op, DAG);
365 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG);
366 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);
367 case ISD::MULHS: return lowerMulDiv(Op, MipsISD::Mult, false, true, DAG);
368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
369 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG);
370 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 109 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
169 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
170 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
171 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
172 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
173 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
174 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
175 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
176 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
177 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/skia/src/utils/ |
| SkCanvasStack.h | 29 void addCanvas(SkCanvas*) override { SkDEBUGFAIL("Invalid Op"); }
30 void removeCanvas(SkCanvas*) override { SkDEBUGFAIL("Invalid Op"); }
35 void onClipRect(const SkRect&, SkRegion::Op, ClipEdgeStyle) override;
36 void onClipRRect(const SkRRect&, SkRegion::Op, ClipEdgeStyle) override;
37 void onClipPath(const SkPath&, SkRegion::Op, ClipEdgeStyle) override;
38 void onClipRegion(const SkRegion&, SkRegion::Op) override;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 123 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerEXTRACT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerINSERT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
136 SDValue LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/clang/lib/CodeGen/ |
| CGExprComplex.cpp | 150 ComplexPairTy EmitCast(CastKind CK, Expr *Op, QualType DestTy);
235 ComplexPairTy EmitBinAdd(const BinOpInfo &Op);
236 ComplexPairTy EmitBinSub(const BinOpInfo &Op);
237 ComplexPairTy EmitBinMul(const BinOpInfo &Op);
238 ComplexPairTy EmitBinDiv(const BinOpInfo &Op);
241 const BinOpInfo &Op);
423 ComplexPairTy ComplexExprEmitter::EmitCast(CastKind CK, Expr *Op,
428 // Atomic to non-atomic casts may be more than a no-op for some platforms and
435 return Visit(Op);
438 LValue origLV = CGF.EmitLValue(Op);
[all...] |
