1 //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief R600 DAG Lowering interface definition 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_R600_R600ISELLOWERING_H 16 #define LLVM_LIB_TARGET_R600_R600ISELLOWERING_H 17 18 #include "AMDGPUISelLowering.h" 19 20 namespace llvm { 21 22 class R600InstrInfo; 23 24 class R600TargetLowering : public AMDGPUTargetLowering { 25 public: 26 R600TargetLowering(TargetMachine &TM, const AMDGPUSubtarget &STI); 27 MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, 28 MachineBasicBlock * BB) const override; 29 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 30 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 31 void ReplaceNodeResults(SDNode * N, 32 SmallVectorImpl<SDValue> &Results, 33 SelectionDAG &DAG) const override; 34 SDValue LowerFormalArguments( 35 SDValue Chain, 36 CallingConv::ID CallConv, 37 bool isVarArg, 38 const SmallVectorImpl<ISD::InputArg> &Ins, 39 SDLoc DL, SelectionDAG &DAG, 40 SmallVectorImpl<SDValue> &InVals) const override; 41 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &, 42 EVT VT) const override; 43 44 private: 45 unsigned Gen; 46 /// Each OpenCL kernel has nine implicit parameters that are stored in the 47 /// first nine dwords of a Vertex Buffer. These implicit parameters are 48 /// lowered to load instructions which retrieve the values from the Vertex 49 /// Buffer. 50 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, 51 SDLoc DL, unsigned DwordOffset) const; 52 53 void lowerImplicitParameter(MachineInstr *MI, MachineBasicBlock &BB, 54 MachineRegisterInfo & MRI, unsigned dword_offset) const; 55 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG, 56 SDLoc DL) const; 57 SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const; 58 59 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 60 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 61 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 62 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const; 63 SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const; 64 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; 65 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 66 SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const; 67 SDValue LowerSHLParts(SDValue Op, SelectionDAG &DAG) const; 68 SDValue LowerSRXParts(SDValue Op, SelectionDAG &DAG) const; 69 SDValue LowerUADDSUBO(SDValue Op, SelectionDAG &DAG, 70 unsigned mainop, unsigned ovf) const; 71 72 SDValue stackPtrToRegIndex(SDValue Ptr, unsigned StackWidth, 73 SelectionDAG &DAG) const; 74 void getStackAddress(unsigned StackWidth, unsigned ElemIdx, 75 unsigned &Channel, unsigned &PtrIncr) const; 76 bool isZero(SDValue Op) const; 77 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override; 78 }; 79 80 } // End namespace llvm; 81 82 #endif 83
