| /external/llvm/lib/CodeGen/ |
| InlineSpiller.cpp | 75 int StackSlot;
78 // All registers to spill to StackSlot, including the main register.
253 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
257 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
624 if (Reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) {
746 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot,
805 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) {
[all...] |
| /art/compiler/optimizing/ |
| locations.h | 220 return Location::StackSlot(GetStackIndex());
231 return Location::StackSlot(GetHighStackIndex(4));
241 static Location StackSlot(intptr_t stack_index) {
|
| parallel_move_resolver.cc | 86 return Location::StackSlot(location.GetStackIndex());
98 return Location::StackSlot(location.GetHighStackIndex(4));
|
| parallel_move_test.cc | 567 Location::StackSlot(48),
571 Location::StackSlot(48),
|
| ssa_liveness_analysis.cc | 553 return Location::StackSlot(GetParent()->GetSpillSlot());
|
| register_allocator.cc | [all...] |
| code_generator_x86.cc | [all...] |
| code_generator_arm.cc | [all...] |
| code_generator_mips.cc | 88 next_location = Location::StackSlot(stack_offset);
124 : Location::StackSlot(stack_offset);
[all...] |
| code_generator_x86_64.cc | [all...] |
| code_generator_mips64.cc | 87 : Location::StackSlot(stack_offset);
[all...] |
| code_generator_arm64.cc | [all...] |
| /external/v8/src/crankshaft/ |
| lithium.h | 21 V(StackSlot, STACK_SLOT, 128) \
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86ISelLowering.h | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
