| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegColoring.cpp | 120 if (MRI->isLiveIn(LHS->reg) != MRI->isLiveIn(RHS->reg))
121 return MRI->isLiveIn(LHS->reg);
142 if (!MRI->isLiveIn(Old))
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 106 /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
109 bool isLiveIn(const MachineBasicBlock &MBB,
285 bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) {
286 return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
|
| MachineBasicBlock.h | 353 /// this than repeatedly calling isLiveIn before calling addLiveIn for every
366 bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask = ~0u) const;
[all...] |
| MachineRegisterInfo.h | 732 bool isLiveIn(unsigned Reg) const;
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIFixSGPRLiveRanges.cpp | 178 bool LiveInToA = LV->isLiveIn(Reg, *SuccA);
179 bool LiveInToB = LV->isLiveIn(Reg, *SuccB);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIAssignInterpRegs.cpp | 127 if (!MRI.isLiveIn(physReg)) {
|
| AMDGPUISelLowering.cpp | 319 if (!MRI.isLiveIn(Reg)) {
|
| /external/llvm/lib/CodeGen/ |
| PHIElimination.cpp | 91 bool isLiveIn(unsigned Reg, const MachineBasicBlock *MBB);
598 ShouldSplit = ShouldSplit && !isLiveIn(Reg, &MBB);
626 bool PHIElimination::isLiveIn(unsigned Reg, const MachineBasicBlock *MBB) {
628 "isLiveIn() requires either LiveVariables or LiveIntervals");
632 return LV->isLiveIn(Reg, *MBB);
|
| MachineBasicBlock.cpp | 347 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const {
382 bool LiveIn = isLiveIn(PhysReg);
[all...] |
| LiveRangeCalc.cpp | 285 !MBB->isLiveIn(PhysReg)) {
|
| MachineRegisterInfo.cpp | 340 bool MachineRegisterInfo::isLiveIn(unsigned Reg) const {
|
| MachineCSE.cpp | 628 if (!MBB->isLiveIn(LiveIn))
|
| MachineSink.cpp | 720 if (SuccToSinkTo->isLiveIn(Reg))
|
| MachineLICM.cpp | 533 if (!BB->isLiveIn(Reg))
914 } else if (CurLoop->getHeader()->isLiveIn(Reg)) {
[all...] |
| LiveVariables.cpp | 721 bool LiveVariables::VarInfo::isLiveIn(const MachineBasicBlock &MBB,
|
| PrologEpilogInserter.cpp | 421 if (!MBB->isLiveIn(Reg))
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 339 if (!MBB->isLiveIn(reg))
345 if (!MBB->isLiveIn(reg))
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.cpp | 117 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
|
| SystemZElimCompare.cpp | 95 if ((*SI)->isLiveIn(SystemZ::CC))
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 240 if (Succ->isLiveIn(X86::EFLAGS))
329 UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 481 if (succMBB->isLiveIn(predReg)) {
|
| HexagonExpandCondsets.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 721 bool LRLiveIn = MF.getRegInfo().isLiveIn(AArch64::LR);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 596 MF.getRegInfo().isLiveIn(Reg))
|
| Thumb2SizeReduction.cpp | [all...] |
