| /external/llvm/test/MC/Mips/ |
| branch-pseudos.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | FileCheck %s
2 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 2>&1 | \
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/ |
| ChangeLog-2012 | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.td | 284 // The portions of MIPS-III that were also added to MIPS32
287 // The portions of MIPS-III that were also added to MIPS32 but were removed in
293 // The portions of MIPS-III that were also added to MIPS32
296 // The portions of MIPS-IV that were also added to MIPS32 but were removed in
[all...] |
| MipsInstrFormats.td | 107 // Mips32/64 Instruction Format
124 // Mips32/64 Pseudo Instruction Format
|
| MipsSEFrameLowering.cpp | 1 //===-- MipsSEFrameLowering.cpp - Mips32/64 Frame Information -------------===//
10 // This file contains the Mips32/64 implementation of TargetFrameLowering class.
[all...] |
| /external/valgrind/coregrind/ |
| m_machine.c | 114 regs->misc.MIPS32.r30
116 regs->misc.MIPS32.r31
118 regs->misc.MIPS32.r28
[all...] |
| /external/clang/lib/Driver/ |
| ToolChains.cpp | [all...] |
| /frameworks/compile/mclinker/lib/Target/Mips/ |
| MipsLDBackend.cpp | 415 return "mips32";
[all...] |
| /ndk/build/tools/ |
| prebuilt-common.sh | 1114 # Set default to mips32
1115 ABI_CONFIGURE_EXTRA_FLAGS="--with-arch=mips32"
[all...] |
| /bionic/tools/relocation_packer/test_data/ |
| elf_file_unittest_relocs_mips32.so | |
| elf_file_unittest_relocs_mips32_packed.so | |
| /external/llvm/lib/Object/ |
| ELFYAML.cpp | 573 IO.enumCase(Value, "MIPS32", 32);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsELFObjectWriter.cpp | 284 // micromips/mips16, four for mips32/64), so we can set HI's SortOffset to
|
| /external/llvm/test/CodeGen/Mips/ |
| fastcc.ll | 4 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -mattr=+nooddspreg | FileCheck %s -check-prefix=NOODDSPREG
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 3 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
|
| /external/skia/site/dev/contrib/ |
| simd.md | 4 Most hot software paths in Skia are implemented with processor-specific SIMD instructions. For graphics performance, the parallelism from SIMD is essential: there is simply no realistic way to eek the same performance out of portable C++ code as we can from the SSE family of instruction sets on x86 or from NEON on ARM or from MIPS32's DSP instructions. Depending on the particular code path and math involved, we see 2, 4, 8, or even ~16x performance increases over portable code when really exploiting the processor-specific SIMD instructions.
|
| /external/v8/src/base/ |
| cpu.cc | 175 // Fall-back to the least common denominator which is mips32 revision 1.
|
| /external/valgrind/cachegrind/ |
| cg_arch.c | 462 // Set caches to default (for MIPS32-r2(mips 74kc))
|
| /external/valgrind/docs/internals/ |
| 3_9_BUGSTATUS.txt | 119 328441 valgrind_3.9.0 failed to compile in mips32
|
| /external/valgrind/include/ |
| pub_tool_basics.h | 133 Linux/MIPS32 and Linux/MIPS64:
|
| /external/valgrind/memcheck/ |
| mc_machine.c | [all...] |
| /toolchain/binutils/binutils-2.25/binutils/ |
| NEWS | 317 * Support for the MIPS32, by Anders Norlander.
|
| /toolchain/binutils/binutils-2.25/gas/ |
| NEWS | 248 * Added support for MIPS32 Release 2.
|
| configure.ac | 209 mips_cpu=mips32
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| cp0sel-names-mips32r2.d | 3 #as: -32 -march=mips32
|
