| /external/llvm/test/CodeGen/X86/ |
| sse-intrinsics-x86.ll | 70 ; CHECK: sbb
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_print.cpp | 503 PRINT(" %sBB:%i", colour[TXT_BRA], asFlow()->target.bb->getId());
|
| /external/v8/test/cctest/ |
| test-disasm-x87.cc | 216 __ sbb(edx, Operand(ebx, ecx, times_4, 10000));
|
| test-disasm-ia32.cc | 216 __ sbb(edx, Operand(ebx, ecx, times_4, 10000));
|
| /external/autotest/client/common_lib/cros/bluetooth/ |
| bluetooth_socket.py | [all...] |
| /external/boringssl/src/crypto/bn/asm/ |
| x86-mont.pl | 576 &sbb ("eax",&DWP(0,$np,$i,4));
583 &sbb ("eax",0); # handle upmost overflow bit
|
| /external/llvm/lib/Target/X86/ |
| X86InstrCompiler.td | 309 // Use sbb to materialize carry bit.
339 // We canonicalize 'setb' to "(and (sbb reg,reg), 1)" on the hope that the and
340 // will be eliminated and that the sbb can be extended up to a wider type. When
341 // this happens, it is great. However, if we are left with an 8-bit sbb and an
354 // (sub OP, SETB) -> (sbb OP, 0)
[all...] |
| X86ISelLowering.h | 100 // Same as SETCC except it's materialized with a sbb and the value is all
332 ADD, SUB, ADC, SBB, SMUL,
[all...] |
| X86InstrArithmetic.td | [all...] |
| X86InstrInfo.td | 229 def X86sbb_flag : SDNode<"X86ISD::SBB", SDTBinaryArithWithFlagsInOut>;
[all...] |
| /external/mesa3d/src/mesa/x86/ |
| assyntax.h | 607 #define SBB_L(a, b) CHOICE(sbbl ARG2(a,b), sbbl ARG2(a,b), _LTOG sbb ARG2(b,a))
608 #define SBB_W(a, b) CHOICE(sbbw ARG2(a,b), sbbw ARG2(a,b), _WTOG sbb ARG2(b,a))
[all...] |
| /external/valgrind/docs/internals/ |
| 3_0_BUGSTATUS.txt | 256 111829 vex x86->IR: unhandled instruction bytes: sbb Al, Ib
629 FIXED-TRUNK: vex:1350 (basic fix), vex:1351 (x86 adc/sbb flags thunk fix),
630 vex:1353 (amd64 adc/sbb flags thunk fix)
|
| /art/disassembler/ |
| disassembler_x86.cc | 335 DISASSEMBLER_ENTRY(sbb,
[all...] |
| /external/google-breakpad/src/third_party/libdisasm/ |
| ia32_opcode_tables.c | 33 { 0, INS_SUB, 0, ADDRMETH_E | OPTYPE_b | OP_SIGNED | OP_W | OP_R, ADDRMETH_G | OPTYPE_b | OP_SIGNED | OP_R, ARG_NONE, cpu_80386 | isa_GP, "sbb", "", 0, 0, 0, INS_SET_ALL|INS_TEST_CARRY, 0 },
34 { 0, INS_SUB, 0, ADDRMETH_E | OPTYPE_v | OP_SIGNED | OP_W | OP_R, ADDRMETH_G | OPTYPE_v | OP_SIGNED | OP_R, ARG_NONE, cpu_80386 | isa_GP, "sbb", "", 0, 0, 0, INS_SET_ALL|INS_TEST_CARRY, 0 },
35 { 0, INS_SUB, 0, ADDRMETH_G | OPTYPE_b | OP_W | OP_SIGNED | OP_R, ADDRMETH_E | OPTYPE_b | OP_SIGNED | OP_R, ARG_NONE, cpu_80386 | isa_GP, "sbb", "", 0, 0, 0, INS_SET_ALL|INS_TEST_CARRY, 0 },
36 { 0, INS_SUB, 0, ADDRMETH_G | OPTYPE_v | OP_SIGNED | OP_W | OP_R, ADDRMETH_E | OPTYPE_v | OP_SIGNED | OP_R, ARG_NONE, cpu_80386 | isa_GP, "sbb", "", 0, 0, 0, INS_SET_ALL|INS_TEST_CARRY, 0 },
37 { 0, INS_SUB, 0, ADDRMETH_RR | OPTYPE_b | OP_SIGNED | OP_W | OP_R, ADDRMETH_I | OPTYPE_b | OP_SIGNED | OP_R, ARG_NONE, cpu_80386 | isa_GP, "sbb", "", 0, 0, 0, INS_SET_ALL|INS_TEST_CARRY, 0 },
38 { 0, INS_SUB, 0, ADDRMETH_RR | OPTYPE_v | OP_SIGNED | OP_W | OP_R, ADDRMETH_I | OPTYPE_v | OP_SIGNED | OP_R, ARG_NONE, cpu_80386 | isa_GP, "sbb", "", 0, 0, 0, INS_SET_ALL|INS_TEST_CARRY, 0 },
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86AsmBackend.cpp | 223 // SBB
|
| /toolchain/binutils/binutils-2.25/gas/ |
| ChangeLog-2012 | [all...] |
| /external/valgrind/VEX/priv/ |
| guest_amd64_toIR.c | 151 dis_op2_G_E (add, or, adc, sbb, and, sub, xor)
153 dis_Grp1 (add, or, adc, sbb, and, sub, xor)
[all...] |
| guest_x86_toIR.c | 164 dis_op2_G_E (add, or, adc, sbb, and, sub, xor)
166 dis_Grp1 (add, or, adc, sbb, and, sub, xor)
[all...] |
| host_x86_defs.c | 447 case Xalu_SBB: return "sbb";
[all...] |
| /external/elfutils/tests/ |
| testfile44.expect.bz2 | |
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| scale_gcc.cc | [all...] |
| scale_win.cc | [all...] |
| /external/v8/src/x87/ |
| assembler-x87.cc | 938 void Assembler::sbb(Register dst, const Operand& src) { function in class:v8::internal::Assembler
[all...] |
| assembler-x87.h | 728 void sbb(Register dst, const Operand& src);
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| rx-decode.c | 767 /** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
779 "/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */",
786 SYNTAX("sbb %1%S1, %0");
788 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
[all...] |
