| /art/compiler/utils/x86/ |
| assembler_x86.h | 623 void Align(int alignment, int offset);
|
| /external/clang/lib/CodeGen/ |
| ItaniumCXXABI.cpp | 166 auto align = CGM.getContext().getTargetDefaultAlignForAttributeAligned(); local
167 return CGM.getContext().toCharUnitsFromBits(align);
[all...] |
| CGBuiltin.cpp | [all...] |
| CGClass.cpp | 586 CharUnits Align = LV.getAlignment().alignmentOfArrayElement(EltSize);
587 LV.setAddress(Address(Dest, Align));
[all...] |
| CodeGenFunction.h | [all...] |
| /external/clang/lib/Frontend/ |
| InitPreprocessor.cpp | [all...] |
| /external/clang/lib/Sema/ |
| SemaDeclObjC.cpp | [all...] |
| /external/clang/tools/c-index-test/ |
| c-index-test.c | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | [all...] |
| AArch64FastISel.cpp | 394 unsigned Align = DL.getPrefTypeAlignment(CFP->getType());
395 if (Align == 0)
396 Align = DL.getTypeAllocSize(CFP->getType());
398 unsigned CPI = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.cpp | 551 unsigned Align = FrameInfo->getObjectAlignment(FrameIndex);
556 Size, Align);
638 unsigned Align = FrameInfo->getObjectAlignment(FrameIndex);
645 PtrInfo, MachineMemOperand::MOLoad, Size, Align);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | 710 unsigned Align = MFI.getObjectAlignment(FI);
714 MFI.getObjectSize(FI), Align);
740 unsigned Align = MFI.getObjectAlignment(FI);
744 MFI.getObjectSize(FI), Align);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 678 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, unsigned Align,
[all...] |
| /external/v8/src/x87/ |
| assembler-x87.h | 567 // possible to align the pc offset to a multiple
569 void Align(int m);
570 // Insert the smallest number of zero bytes possible to align the pc offset
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 36 SpillAlignedNEONRegs("align-neon-spills", cl::Hidden, cl::init(true),
37 cl::desc("Align ARM NEON spills in prolog and epilog"));
227 /// Emit an instruction sequence that will align the address in
304 unsigned Align = STI.getFrameLowering()->getStackAlignment();
395 unsigned DPRAlign = DPRCSSize ? std::min(8U, Align) : 4U;
415 // Prolog/epilog inserter assumes we correctly align DPRs on the stack, so our
[all...] |
| ARMLoadStoreOptimizer.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| ScalarReplAggregates.cpp | [all...] |
| /external/skia/src/core/ |
| SkPaint.cpp | 363 void SkPaint::setTextAlign(Align align) {
364 if ((unsigned)align < kAlignCount) {
365 fBitfields.fTextAlign = SkToU8(align);
368 SkDebugf("SkPaint::setTextAlign(%d) out of range\n", align);
[all...] |
| /external/skia/src/utils/ |
| SkLua.cpp | 952 SkPaint::Align fAlign;
960 SkPaint::Align align = get_obj<SkPaint>(L, 1)->getTextAlign(); local
962 if (gAlignRec[i].fAlign == align) {
[all...] |
| /external/v8/src/ |
| gdb-jit.cc | 116 void Align(uintptr_t align) {
117 uintptr_t delta = position_ % align;
119 uintptr_t padding = align - delta;
121 DCHECK((position_ % align) == 0);
209 uint32_t align; member in struct:v8::internal::MachOSectionHeader
228 MachOSection(const char* name, const char* segment, uint32_t align,
230 : name_(name), segment_(segment), align_(align), flags_(flags) {
232 DCHECK(base::bits::IsPowerOfTwo32(align));
243 header->align = align_
1668 uint32_t align = (w->position() - initial_position) % kPointerSize; local
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.cc | 314 void Assembler::Align(int m) {
397 Align(16); // Preferred alignment of jump targets on ia32.
[all...] |
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 694 void Align(int alignment, int offset);
[all...] |
| /external/skia/tools/json/ |
| SkJSONCanvas.cpp | 390 SkPaint::Align textAlign = paint.getTextAlign();
[all...] |
| SkJSONRenderer.cpp | 452 SkPaint::Align textAlign;
[all...] |
