| /external/llvm/lib/CodeGen/ |
| PostRASchedulerList.cpp | 67 // If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod
305 for (auto &MBB : Fn) {
307 // If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod
313 << ":BB#" << MBB.getNumber() << " ***\n";
318 Scheduler.startBlock(&MBB);
322 MachineBasicBlock::iterator Current = MBB.end();
323 unsigned Count = MBB.size(), CurrentCount = Count;
324 for (MachineBasicBlock::iterator I = Current; I != MBB.begin();) {
330 if (MI->isCall() || TII->isSchedulingBoundary(MI, &MBB, Fn)) {
331 Scheduler.enterRegion(&MBB, I, Current, CurrentCount - Count)
[all...] |
| TwoAddressInstructionPass.cpp | 84 MachineBasicBlock *MBB;
227 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();
247 if (!KillMI || KillMI->getParent() != MBB || KillMI == MI ||
304 MBB->remove(MI);
305 MBB->insert(KillPos, MI);
340 MachineInstr *Def = getSingleDef(TmpReg, MBB, MRI);
353 /// in the MBB that defines the specified register and the two-address
362 if (MI->getParent() != MBB || MI->isDebugValue())
492 MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB,
501 if (UseMI.getParent() != MBB)
[all...] |
| LiveIntervalAnalysis.cpp | 225 for (MachineBasicBlock &MBB : *MF) {
226 std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB.getNumber()];
230 if (const uint32_t *Mask = MBB.getBeginClobberMask(TRI)) {
231 RegMaskSlots.push_back(Indexes->getMBBStartIdx(&MBB));
235 for (MachineInstr &MI : MBB) {
245 if (const uint32_t *Mask = MBB.getEndClobberMask(TRI)) {
246 RegMaskSlots.push_back(Indexes->getMBBEndIdx(&MBB));
317 const MachineBasicBlock *MBB = &*MFI;
320 if ((MFI != MF->begin() && !MBB->isEHPad()) || MBB->livein_empty()
[all...] |
| PrologEpilogInserter.cpp | 152 for (MachineBasicBlock &MBB : Fn) {
153 if (MBB.isEHFuncletEntry())
154 SaveBlocks.push_back(&MBB);
155 if (MBB.isReturnBlock())
156 RestoreBlocks.push_back(&MBB);
417 for (MachineBasicBlock *MBB : Visited) {
421 if (!MBB->isLiveIn(Reg))
422 MBB->addLiveIn(Reg);
463 for (MachineBasicBlock *MBB : RestoreBlocks) {
464 I = MBB->end()
[all...] |
| RegAllocFast.cpp | 63 MachineBasicBlock *MBB;
290 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
308 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE))
313 assert(NewDV->getParent() == MBB && "dangling parent pointer");
637 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);
794 DEBUG(dbgs() << "\nAllocating " << *MBB);
799 MachineBasicBlock::iterator MII = MBB->begin();
802 for (const auto &LI : MBB->liveins())
809 // Otherwise, sequentially allocate each instruction in the MBB.
810 while (MII != MBB->end())
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64AdvSIMDScalarPass.cpp | 87 bool processMachineBasicBlock(MachineBasicBlock *MBB);
299 MachineBasicBlock *MBB = MI->getParent();
356 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(NewOpc), Dst)
372 bool AArch64AdvSIMDScalar::processMachineBasicBlock(MachineBasicBlock *MBB) {
374 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;) {
|
| AArch64StorePairSuppress.cpp | 137 for (auto &MBB : MF) {
140 for (auto &MI : MBB) {
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 98 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
100 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
417 MachineBasicBlock &MBB;
426 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
432 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
445 : MBB(*MI->getParent()), Begin(MI), End(getBundleEnd(MI)) {}
448 MachineBasicBlock &getMBB() const { return MBB; }
464 MBB.insert(I, MI);
482 /// Insert MI into MBB by prepending it to the instructions in the bundle.
488 /// Insert MI into MBB by appending it to the instructions in the bundle
[all...] |
| MachineInstrBundle.h | 28 void finalizeBundle(MachineBasicBlock &MBB,
35 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
37 MachineBasicBlock::instr_iterator finalizeBundle(MachineBasicBlock &MBB,
|
| MachineLoopInfo.h | 61 explicit MachineLoop(MachineBasicBlock *MBB)
62 : LoopBase<MachineBasicBlock, MachineLoop>(MBB) {}
|
| SlotIndexes.h | 351 /// MBBRanges - Map MBB number to (start, stop) indexes.
355 /// and MBB id.
396 void repairIndexesInRange(MachineBasicBlock *MBB,
447 const MachineBasicBlock *MBB = MI->getParent();
448 assert(MBB && "MI must be inserted inna basic block");
449 MachineBasicBlock::const_iterator I = MI, B = MBB->begin();
452 return getMBBStartIdx(MBB);
464 const MachineBasicBlock *MBB = MI->getParent();
465 assert(MBB && "MI must be inserted inna basic block");
466 MachineBasicBlock::const_iterator I = MI, E = MBB->end()
[all...] |
| AsmPrinter.h | 304 virtual void EmitBasicBlockStart(const MachineBasicBlock &MBB) const;
307 virtual void EmitBasicBlockEnd(const MachineBasicBlock &MBB) {}
331 isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
542 const MachineBasicBlock *MBB, unsigned uid) const;
|
| LiveIntervalAnalysis.h | 146 /// instruction to the end of its MBB.
213 SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const {
214 return Indexes->getMBBStartIdx(mbb);
218 SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const {
219 return Indexes->getMBBEndIdx(mbb);
223 const MachineBasicBlock *mbb) const {
224 return LR.liveAt(getMBBStartIdx(mbb));
228 const MachineBasicBlock *mbb) const {
229 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot());
236 void insertMBBInMaps(MachineBasicBlock *MBB) {
[all...] |
| MachineOperand.h | 155 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
427 return Contents.MBB;
532 void setMBB(MachineBasicBlock *MBB) {
534 Contents.MBB = MBB;
622 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
625 Op.setMBB(MBB);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 36 MachineBasicBlock *MBB;
127 MachineBasicBlock *getBlock() { return MBB; }
134 InstrEmitter(MachineBasicBlock *mbb, MachineBasicBlock::iterator insertpos);
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 98 void copyPhysReg(MachineBasicBlock &MBB,
103 unsigned calculateLDSSpillAddress(MachineBasicBlock &MBB,
110 void storeRegToStackSlot(MachineBasicBlock &MBB,
116 void loadRegFromStackSlot(MachineBasicBlock &MBB,
140 MachineInstr *buildMovInstr(MachineBasicBlock *MBB,
150 MachineInstr *convertToThreeAddress(MachineFunction::iterator &MBB,
427 MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
433 MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
|
| R600OptimizeVectorRegisters.cpp | 183 MachineBasicBlock &MBB = *Pos->getParent();
196 MachineInstr *Tmp = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::INSERT_SUBREG),
213 Pos = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::COPY), Reg)
319 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
320 MBB != MBBe; ++MBB) {
321 MachineBasicBlock *MB = &*MBB;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.h | 54 const MachineBasicBlock *MBB) override;
69 void endPacket(MachineBasicBlock *MBB, MachineInstr *MI) override;
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 278 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
285 MachineBasicBlock::iterator I = MBB.end();
286 if (I == MBB.begin())
301 if (I == MBB.begin())
346 while (DI != MBB.end()) {
357 if (I == MBB.begin())
369 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
370 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
371 if (I == MBB.end())
381 I = MBB.end()
[all...] |
| ARMConstantPoolValue.h | 221 const MachineBasicBlock *MBB; // Machine basic block.
223 ARMConstantPoolMBB(LLVMContext &C, const MachineBasicBlock *mbb, unsigned id,
229 const MachineBasicBlock *mbb,
232 const MachineBasicBlock *getMBB() const { return MBB; }
250 return MBB == A->MBB && ARMConstantPoolValue::equals(A);
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| WinException.h | 100 void beginFunclet(const MachineBasicBlock &MBB, MCSymbol *Sym) override;
|
| AsmPrinter.cpp | 845 for (auto &MBB : *MF) {
847 EmitBasicBlockStart(MBB);
848 for (auto &MI : MBB) {
910 EmitBasicBlockEnd(MBB);
[all...] |
| /external/llvm/lib/CodeGen/MIRParser/ |
| MIParser.h | 71 bool parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.h | 31 MachineBasicBlock *MBB) const override;
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPEI.cpp | 166 for (MachineBasicBlock &MBB : Fn) {
167 if (MBB.isEHFuncletEntry())
168 SaveBlocks.push_back(&MBB);
169 if (MBB.isReturnBlock())
170 RestoreBlocks.push_back(&MBB);
433 for (MachineBasicBlock *MBB : Visited) {
437 if (!MBB->isLiveIn(Reg))
438 MBB->addLiveIn(Reg);
479 for (MachineBasicBlock *MBB : RestoreBlocks) {
480 I = MBB->end()
[all...] |
