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  /libcore/support/src/test/java/libcore/java/security/
StandardNames.java 710 private static final void addRi(String cipherSuite) {
719 addRi(cipherSuite);
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  /external/llvm/lib/Target/Sparc/
SparcFrameLowering.h 62 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
SparcFrameLowering.cpp 45 unsigned ADDri) const {
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
119 SAVEri = SP::ADDri;
196 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri);
222 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri);
SparcInstrAliases.td 342 def : InstAlias<"inc $rd", (ADDri IntRegs:$rd, IntRegs:$rd, 1), 0>;
345 def : InstAlias<"inc $simm13, $rd", (ADDri IntRegs:$rd, IntRegs:$rd, i32imm:$simm13), 0>;
DelaySlotFiller.cpp 490 case SP::ADDri: return combineRestoreADD(MBBI, PrevInst, TII); break;
SparcInstrInfo.td     [all...]
  /external/llvm/test/CodeGen/ARM/
crash-O0.ll 17 ; This function uses the scavenger for an ADDri instruction.
  /external/llvm/test/CodeGen/MIR/ARM/
cfi-same-value.mir 77 %sp = ADDri killed %sp, 40, 14, _, _
  /external/llvm/lib/CodeGen/
README.txt 35 %reg1037 = ADDri %reg1039, 1
43 Note ADDri is not a two-address instruction. However, its result %reg1037 is an
45 PHI node. We should treat it as a two-address code and make sure the ADDri is
  /external/llvm/lib/Target/ARM/
ARMMCInstLower.cpp 134 case ARM::ADDri:
ARMBaseInstrInfo.cpp 180 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
203 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
    [all...]
ARMBaseRegisterInfo.cpp 561 unsigned ADDriOpc = !AFI->isThumbFunction() ? ARM::ADDri :
ARMAsmPrinter.cpp     [all...]
ARMFrameLowering.cpp     [all...]
ARMLoadStoreOptimizer.cpp 656 isThumb1 ? ARM::tADDi8 : ARM::ADDri;
    [all...]
ARMISelDAGToDAG.cpp     [all...]
ARMFastISel.cpp 717 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri;
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  /toolchain/binutils/binutils-2.25/opcodes/
score-dis.c 65 {0x10000000, 0x3e000001, "addri\t\t%20-24r, %15-19r, %1-14i"},
66 {0x10000001, 0x3e000001, "addri.c\t\t%20-24r, %15-19r, %1-14i"},
    [all...]
score-opc.h 44 {0x10000000, 0x3e000001, "addri\t\t%20-24r, %15-19r, %1-14i"},
45 {0x10000001, 0x3e000001, "addri.c\t\t%20-24r, %15-19r, %1-14i"},
score7-dis.c 72 {0x10000000, 0x3e000001, "addri\t\t%20-24r, %15-19r, %1-14i"},
73 {0x10000001, 0x3e000001, "addri.c\t\t%20-24r, %15-19r, %1-14i"},
    [all...]
  /toolchain/binutils/binutils-2.25/gas/config/
tc-score7.c 663 {"addri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_rdrssi14},
664 {"addri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_rdrssi14},
    [all...]
tc-score.c 602 {"addri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s3_do_rdrssi14},
603 {"addri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s3_do_rdrssi14},
    [all...]
  /external/llvm/docs/
WritingAnLLVMBackend.rst 731 LLVM target could model this with two instructions named ``ADDri`` and
    [all...]
  /external/llvm/lib/Target/X86/
X86FrameLowering.cpp     [all...]
  /toolchain/binutils/binutils-2.25/gas/
ChangeLog-2007     [all...]

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