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  /external/pcre/dist/sljit/
sljitNativeTILEGX_64.c 52 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
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sljitNativeX86_32.c 90 PUSH_REG(reg_map[TMP_REG1]);
94 *inst++ = MOD_REG | (reg_map[TMP_REG1] << 3) | 0x4 /* esp */;
98 PUSH_REG(reg_map[SLJIT_S2]);
100 PUSH_REG(reg_map[SLJIT_S1]);
102 PUSH_REG(reg_map[SLJIT_S0]);
107 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | reg_map[SLJIT_R2];
111 *inst++ = MOD_REG | (reg_map[SLJIT_S1] << 3) | reg_map[SLJIT_R1];
115 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S2] << 3) | 0x4 /* esp */
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sljitNativeX86_64.c 36 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B);
37 *inst++ = MOV_r_i32 + (reg_map[reg] & 0x7);
50 SLJIT_COMPILE_ASSERT(reg_map[TMP_REG3] == 9, tmp3_is_9_first);
77 SLJIT_COMPILE_ASSERT(reg_map[TMP_REG3] == 9, tmp3_is_9_second);
108 size = reg_map[i] >= 8 ? 2 : 1;
112 if (reg_map[i] >= 8)
118 size = reg_map[i] >= 8 ? 2 : 1;
122 if (reg_map[i] >= 8)
138 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | 0x7 /* rdi */;
154 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | 0x1 /* rcx */
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sljitNativeARM_T2_32.c 45 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
53 #define RD3(rd) (reg_map[rd])
54 #define RN3(rn) (reg_map[rn] << 3)
55 #define RM3(rm) (reg_map[rm] << 6)
56 #define RDN3(rdn) (reg_map[rdn] << 8)
62 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
64 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7
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sljitNativeX86_common.c 69 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 3] = { variable
92 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
95 /* low-map. reg_map & 0x7. */
101 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
104 /* low-map. reg_map & 0x7. */
678 return emit_do_imm(compiler, MOV_r_i32 + reg_map[dst], srcw);
685 return emit_do_imm32(compiler, (reg_map[dst] >= 8) ? REX_B : 0, MOV_r_i32 + reg_lmap[dst], srcw);
755 reg_map[SLJIT_R0] == 0
756 && reg_map[SLJIT_R1] == 2
757 && reg_map[TMP_REG1] > 7
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sljitNativeARM_32.c 58 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
62 #define RM(rm) (reg_map[rm])
63 #define RD(rd) (reg_map[rd] << 12)
64 #define RN(rn) (reg_map[rn] << 16)
845 push |= 1 << reg_map[i];
848 push |= 1 << reg_map[i];
903 pop |= 1 << reg_map[i];
906 pop |= 1 << reg_map[i];
941 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2)
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sljitNativeSPARC_common.c 94 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
102 #define D(d) (reg_map[d] << 25)
104 #define S1(s1) (reg_map[s1] << 14)
105 #define S2(s2) (reg_map[s2])
112 #define DR(dr) (reg_map[dr])
920 return reg_map[reg];
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sljitNativeARM_64.c 46 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
51 #define RD(rd) (reg_map[rd])
52 #define RT(rt) (reg_map[rt])
53 #define RN(rn) (reg_map[rn] << 5)
54 #define RT2(rt2) (reg_map[rt2] << 10)
55 #define RM(rm) (reg_map[rm] << 16)
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sljitNativeMIPS_common.c 71 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
79 #define S(s) (reg_map[s] << 21)
80 #define T(t) (reg_map[t] << 16)
81 #define D(d) (reg_map[d] << 11)
92 #define DR(dr) (reg_map[dr])
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sljitNativePPC_common.c 104 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
111 #define D(d) (reg_map[d] << 21)
112 #define S(s) (reg_map[s] << 21)
113 #define A(a) (reg_map[a] << 16)
114 #define B(b) (reg_map[b] << 11)
115 #define C(c) (reg_map[c] << 6)
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  /toolchain/binutils/binutils-2.25/include/opcode/
mips.h 574 /* If nonnull, REG_MAP[N] gives the register associated with encoding N,
576 const unsigned char *reg_map; member in struct:mips_reg_operand
707 if (operand->reg_map)
708 uval = operand->reg_map[uval];
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  /toolchain/binutils/binutils-2.25/gas/config/
tc-mips.c     [all...]
  /toolchain/binutils/binutils-2.25/gas/
ChangeLog-0203     [all...]

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