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      1 //===-- PPCTOCRegDeps.cpp - Add Extra TOC Register Dependencies -----------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // When resolving an address using the ELF ABI TOC pointer, two relocations are
     11 // generally required: one for the high part and one for the low part. Only
     12 // the high part generally explicitly depends on r2 (the TOC pointer). And, so,
     13 // we might produce code like this:
     14 //
     15 // .Ltmp526:
     16 //         addis 3, 2, .LC12@toc@ha
     17 // .Ltmp1628:
     18 //         std 2, 40(1)
     19 //         ld 5, 0(27)
     20 //         ld 2, 8(27)
     21 //         ld 11, 16(27)
     22 //         ld 3, .LC12@toc@l(3)
     23 //         rldicl 4, 4, 0, 32
     24 //         mtctr 5
     25 //         bctrl
     26 //         ld 2, 40(1)
     27 //
     28 // And there is nothing wrong with this code, as such, but there is a linker bug
     29 // in binutils (https://sourceware.org/bugzilla/show_bug.cgi?id=18414) that will
     30 // misoptimize this code sequence to this:
     31 //         nop
     32 //         std     r2,40(r1)
     33 //         ld      r5,0(r27)
     34 //         ld      r2,8(r27)
     35 //         ld      r11,16(r27)
     36 //         ld      r3,-32472(r2)
     37 //         clrldi  r4,r4,32
     38 //         mtctr   r5
     39 //         bctrl
     40 //         ld      r2,40(r1)
     41 // because the linker does not know (and does not check) that the value in r2
     42 // changed in between the instruction using the .LC12@toc@ha (TOC-relative)
     43 // relocation and the instruction using the .LC12@toc@l(3) relocation.
     44 // Because it finds these instructions using the relocations (and not by
     45 // scanning the instructions), it has been asserted that there is no good way
     46 // to detect the change of r2 in between. As a result, this bug may never be
     47 // fixed (i.e. it may become part of the definition of the ABI). GCC was
     48 // updated to add extra dependencies on r2 to instructions using the @toc@l
     49 // relocations to avoid this problem, and we'll do the same here.
     50 //
     51 // This is done as a separate pass because:
     52 //  1. These extra r2 dependencies are not really properties of the
     53 //     instructions, but rather due to a linker bug, and maybe one day we'll be
     54 //     able to get rid of them when targeting linkers without this bug (and,
     55 //     thus, keeping the logic centralized here will make that
     56 //     straightforward).
     57 //  2. There are ISel-level peephole optimizations that propagate the @toc@l
     58 //     relocations to some user instructions, and so the exta dependencies do
     59 //     not apply only to a fixed set of instructions (without undesirable
     60 //     definition replication).
     61 //
     62 //===----------------------------------------------------------------------===//
     63 
     64 #include "PPCInstrInfo.h"
     65 #include "MCTargetDesc/PPCPredicates.h"
     66 #include "PPC.h"
     67 #include "PPCInstrBuilder.h"
     68 #include "PPCMachineFunctionInfo.h"
     69 #include "PPCTargetMachine.h"
     70 #include "llvm/ADT/STLExtras.h"
     71 #include "llvm/ADT/Statistic.h"
     72 #include "llvm/CodeGen/MachineFrameInfo.h"
     73 #include "llvm/CodeGen/MachineFunctionPass.h"
     74 #include "llvm/CodeGen/MachineInstr.h"
     75 #include "llvm/CodeGen/MachineRegisterInfo.h"
     76 #include "llvm/MC/MCAsmInfo.h"
     77 #include "llvm/Support/CommandLine.h"
     78 #include "llvm/Support/Debug.h"
     79 #include "llvm/Support/ErrorHandling.h"
     80 #include "llvm/Support/TargetRegistry.h"
     81 #include "llvm/Support/raw_ostream.h"
     82 
     83 using namespace llvm;
     84 
     85 #define DEBUG_TYPE "ppc-toc-reg-deps"
     86 
     87 namespace llvm {
     88   void initializePPCTOCRegDepsPass(PassRegistry&);
     89 }
     90 
     91 namespace {
     92   // PPCTOCRegDeps pass - For simple functions without epilogue code, move
     93   // returns up, and create conditional returns, to avoid unnecessary
     94   // branch-to-blr sequences.
     95   struct PPCTOCRegDeps : public MachineFunctionPass {
     96     static char ID;
     97     PPCTOCRegDeps() : MachineFunctionPass(ID) {
     98       initializePPCTOCRegDepsPass(*PassRegistry::getPassRegistry());
     99     }
    100 
    101 protected:
    102     bool hasTOCLoReloc(const MachineInstr &MI) {
    103       if (MI.getOpcode() == PPC::LDtocL ||
    104           MI.getOpcode() == PPC::ADDItocL)
    105         return true;
    106 
    107       for (const MachineOperand &MO : MI.operands()) {
    108         if ((MO.getTargetFlags() & PPCII::MO_ACCESS_MASK) == PPCII::MO_TOC_LO)
    109           return true;
    110       }
    111 
    112       return false;
    113     }
    114 
    115     bool processBlock(MachineBasicBlock &MBB) {
    116       bool Changed = false;
    117 
    118       for (auto &MI : MBB) {
    119         if (!hasTOCLoReloc(MI))
    120           continue;
    121 
    122         MI.addOperand(MachineOperand::CreateReg(PPC::X2,
    123                                                 false  /*IsDef*/,
    124                                                 true  /*IsImp*/));
    125         Changed = true;
    126       }
    127 
    128       return Changed;
    129     }
    130 
    131 public:
    132     bool runOnMachineFunction(MachineFunction &MF) override {
    133       bool Changed = false;
    134 
    135       for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
    136         MachineBasicBlock &B = *I++;
    137         if (processBlock(B))
    138           Changed = true;
    139       }
    140 
    141       return Changed;
    142     }
    143 
    144     void getAnalysisUsage(AnalysisUsage &AU) const override {
    145       MachineFunctionPass::getAnalysisUsage(AU);
    146     }
    147   };
    148 }
    149 
    150 INITIALIZE_PASS(PPCTOCRegDeps, DEBUG_TYPE,
    151                 "PowerPC TOC Register Dependencies", false, false)
    152 
    153 char PPCTOCRegDeps::ID = 0;
    154 FunctionPass*
    155 llvm::createPPCTOCRegDepsPass() { return new PPCTOCRegDeps(); }
    156 
    157