| /frameworks/compile/slang/ |
| slang_rs_ast_replace.cpp | 120 void RSASTReplace::VisitForStmt(clang::ForStmt *FS) {
121 if (matchesStmt(FS->getInit())) {
122 FS->setInit(mNewStmt);
123 } else if (matchesExpr(FS->getCond())) {
124 FS->setCond(mNewExpr);
125 } else if (matchesExpr(FS->getInc())) {
126 FS->setInc(mNewExpr);
127 } else if (matchesStmt(FS->getBody())) {
128 FS->setBody(mNewStmt);
130 VisitStmt(FS);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUSubtarget.cpp | 37 StringRef GPU, StringRef FS) {
48 FullFS += FS;
65 AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
67 : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
81 initializeSubtargetDependencies(TT, GPU, FS);
|
| AMDGPUTargetMachine.h | 40 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef FS,
66 R600TargetMachine(const Target &T, const Triple &TT, StringRef FS,
80 GCNTargetMachine(const Target &T, const Triple &TT, StringRef FS,
|
| /external/slf4j/slf4j-migrator/src/test/java/org/slf4j/migrator/helper/ |
| AbbreviatorTest.java | 33 static final char FS = '/';
37 RandomHelper rh = new RandomHelper(FS);
53 Abbreviator abb = new Abbreviator(2, 100, FS);
59 Abbreviator abb = new Abbreviator(3, 8, FS);
64 Abbreviator abb = new Abbreviator(3, 8, FS);
71 Abbreviator abb = new Abbreviator(2, 20, FS);
78 Abbreviator abb = new Abbreviator(2, 100, FS);
86 Abbreviator abb = new Abbreviator(0, 100, FS);
118 Abbreviator abb = new Abbreviator(fixedLen, targetLen, FS);
|
| /external/llvm/lib/Target/ |
| TargetSubtargetInfo.cpp | 23 const Triple &TT, StringRef CPU, StringRef FS,
28 : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) {
|
| /external/ltrace/sysdeps/linux-gnu/ |
| arch_mksyscallent | 27 FS="[ \t\n()+]+";
|
| mksyscallent | 29 FS="[ \t\n()+]+";
|
| mksyscallent_mips | 28 FS="[ \t\n()+]+";
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUSubtarget.h | 43 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS);
47 virtual void ParseSubtargetFeatures(llvm::StringRef CPU, llvm::StringRef FS);
|
| AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
35 ParseSubtargetFeatures(GPU, FS);
|
| /external/strace/linux/i386/ |
| userent.h | 10 XLAT(4*FS),
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetMachine.h | 31 StringRef FS, const TargetOptions &Options,
58 StringRef FS, const TargetOptions &Options,
69 StringRef FS, const TargetOptions &Options,
|
| AArch64Subtarget.cpp | 40 AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
46 ParseSubtargetFeatures(CPUString, FS);
51 const std::string &FS,
53 : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
59 InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(),
|
| /external/llvm/lib/Target/BPF/ |
| BPFTargetMachine.cpp | 40 StringRef CPU, StringRef FS,
44 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
47 Subtarget(TT, CPU, FS, *this) {
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSubtarget.h | 60 HexagonSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
83 StringRef FS);
87 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/Mips/ |
| MipsTargetMachine.h | 43 StringRef FS, const TargetOptions &Options, Reloc::Model RM,
77 StringRef FS, const TargetOptions &Options,
88 StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXSubtarget.h | 56 const std::string &FS, const NVPTXTargetMachine &TM);
102 NVPTXSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
103 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| NVPTXTargetMachine.h | 38 StringRef FS, const TargetOptions &Options,
72 StringRef FS, const TargetOptions &Options,
81 StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetMachine.h | 38 StringRef FS, const TargetOptions &Options, Reloc::Model RM,
66 StringRef FS, const TargetOptions &Options,
77 StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcSubtarget.h | 47 const std::string &FS, TargetMachine &TM, bool is64bit);
75 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
76 SparcSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZSubtarget.h | 57 StringRef FS);
60 const std::string &FS, const TargetMachine &TM);
80 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/XCore/ |
| XCoreTargetMachine.cpp | 26 StringRef CPU, StringRef FS,
32 TT, CPU, FS, Options, RM, CM, OL),
34 Subtarget(TT, CPU, FS, *this) {
|
| /external/valgrind/none/tests/mips64/ |
| move_instructions.c | 92 /* movX.s fd, fs */
93 #define TEST3(instruction, FD, FS, cc, offset) \
102 "dmtc1 $zero, $"#FS "\n\t" \
105 "lwc1 $"#FS", "#offset"($t0)" "\n\t" \
110 : "t0", "t1", "$"#FD, "$"#FS, "$f0", "$f2" \
116 /* movX.d fd, fs */
117 #define TEST3d(instruction, FD, FS, cc, offset) \
128 "ldc1 $"#FS", "#offset"($t0)" "\n\t" \
133 : "t0", "t1", "$"#FD, "$"#FS, "$f0", "$f2" \
139 /* movX.s fd, fs, rt *
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCSubtargetInfo.h | 45 FeatureBitset FeatureBits; // Feature bits for current CPU + FS
53 MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS,
86 void InitMCProcessorInfo(StringRef CPU, StringRef FS);
91 void setDefaultFeatures(StringRef CPU, StringRef FS);
103 FeatureBitset ToggleFeature(StringRef FS);
107 FeatureBitset ApplyFeatureFlag(StringRef FS);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetMachine.cpp | 177 StringRef CPU, StringRef FS,
182 CPU, FS, Options, RM, CM, OL),
185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {
212 std::string FS = !FSAttr.hasAttribute(Attribute::None)
227 FS += FS.empty() ? "+soft-float" : ",+soft-float";
229 auto &I = SubtargetMap[CPU + FS];
235 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle);
249 StringRef CPU, StringRef FS,
253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle)
[all...] |
