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      1 //===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 //
     11 //===----------------------------------------------------------------------===//
     12 
     13 #include "XCoreTargetMachine.h"
     14 #include "XCoreTargetObjectFile.h"
     15 #include "XCoreTargetTransformInfo.h"
     16 #include "XCore.h"
     17 #include "llvm/CodeGen/Passes.h"
     18 #include "llvm/IR/Module.h"
     19 #include "llvm/IR/LegacyPassManager.h"
     20 #include "llvm/Support/TargetRegistry.h"
     21 using namespace llvm;
     22 
     23 /// XCoreTargetMachine ctor - Create an ILP32 architecture model
     24 ///
     25 XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
     26                                        StringRef CPU, StringRef FS,
     27                                        const TargetOptions &Options,
     28                                        Reloc::Model RM, CodeModel::Model CM,
     29                                        CodeGenOpt::Level OL)
     30     : LLVMTargetMachine(
     31           T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
     32           TT, CPU, FS, Options, RM, CM, OL),
     33       TLOF(make_unique<XCoreTargetObjectFile>()),
     34       Subtarget(TT, CPU, FS, *this) {
     35   initAsmInfo();
     36 }
     37 
     38 XCoreTargetMachine::~XCoreTargetMachine() {}
     39 
     40 namespace {
     41 /// XCore Code Generator Pass Configuration Options.
     42 class XCorePassConfig : public TargetPassConfig {
     43 public:
     44   XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM)
     45     : TargetPassConfig(TM, PM) {}
     46 
     47   XCoreTargetMachine &getXCoreTargetMachine() const {
     48     return getTM<XCoreTargetMachine>();
     49   }
     50 
     51   void addIRPasses() override;
     52   bool addPreISel() override;
     53   bool addInstSelector() override;
     54   void addPreEmitPass() override;
     55 };
     56 } // namespace
     57 
     58 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
     59   return new XCorePassConfig(this, PM);
     60 }
     61 
     62 void XCorePassConfig::addIRPasses() {
     63   addPass(createAtomicExpandPass(&getXCoreTargetMachine()));
     64 
     65   TargetPassConfig::addIRPasses();
     66 }
     67 
     68 bool XCorePassConfig::addPreISel() {
     69   addPass(createXCoreLowerThreadLocalPass());
     70   return false;
     71 }
     72 
     73 bool XCorePassConfig::addInstSelector() {
     74   addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
     75   return false;
     76 }
     77 
     78 void XCorePassConfig::addPreEmitPass() {
     79   addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
     80 }
     81 
     82 // Force static initialization.
     83 extern "C" void LLVMInitializeXCoreTarget() {
     84   RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
     85 }
     86 
     87 TargetIRAnalysis XCoreTargetMachine::getTargetIRAnalysis() {
     88   return TargetIRAnalysis([this](const Function &F) {
     89     return TargetTransformInfo(XCoreTTIImpl(this, F));
     90   });
     91 }
     92