| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-crx/ |
| reloc-imm16.d | 1 #source: reloc-imm16.s
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| add_test.s | 5 # ADDB imm4/imm16, reg
24 # ADDCB imm4/imm16, reg
43 # ADDCW imm4/imm16, reg
62 # ADDW imm4/imm16, reg
80 # ADDD imm4/imm16/imm20/imm32, regp
|
| sub_test.s | 5 # SUBB imm4/imm16, reg
23 # SUBCB imm4/imm16, reg
41 # SUBCW imm4/imm16, reg
59 # SUBW imm4/imm16, reg
77 # SUBD imm4/imm16/imm32, regp
|
| and_test.s | 5 # ANDB imm4/imm16, reg
23 # ANDW imm4/imm16, reg
41 # ANDD imm4/imm16/imm32, regp
|
| cmp_test.s | 5 # CMPB imm4/imm16, reg
24 # CMPW imm4/imm16, reg
44 # CMPD imm4/imm16/imm32, regp
|
| mov_test.s | 5 # MOVB imm4/imm16, reg
24 # MOVW imm4/imm16, reg
44 # MOVD imm4/imm16/imm20/imm32, regp
|
| mul_test.s | 5 # MULB imm4/imm16, reg
23 # MULW imm4/imm16, reg
|
| or_test.s | 5 # ORB imm4/imm16, reg
23 # ORW imm4/imm16, reg
|
| xor_test.s | 5 # XORB imm4/imm16, reg
23 # XORW imm4/imm16, reg
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 125 void Addiu(Register rt, Register rs, uint16_t imm16);
146 void Andi(Register rt, Register rs, uint16_t imm16);
148 void Ori(Register rt, Register rs, uint16_t imm16);
150 void Xori(Register rt, Register rs, uint16_t imm16);
178 void Lb(Register rt, Register rs, uint16_t imm16);
179 void Lh(Register rt, Register rs, uint16_t imm16);
180 void Lw(Register rt, Register rs, uint16_t imm16);
181 void Lwl(Register rt, Register rs, uint16_t imm16);
182 void Lwr(Register rt, Register rs, uint16_t imm16);
183 void Lbu(Register rt, Register rs, uint16_t imm16);
[all...] |
| assembler_mips.cc | 190 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) {
191 EmitI(0x9, rs, rt, imm16);
286 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) {
287 EmitI(0xc, rs, rt, imm16);
294 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) {
295 EmitI(0xd, rs, rt, imm16);
302 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) {
303 EmitI(0xe, rs, rt, imm16);
417 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) {
418 EmitI(0x20, rs, rt, imm16);
760 Bc1f(static_cast<int>(rs), imm16); local
764 Bc1t(static_cast<int>(rs), imm16); local
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 123 void Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
125 void Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
143 void Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16);
145 void Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
147 void Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
185 void Lb(GpuRegister rt, GpuRegister rs, uint16_t imm16);
186 void Lh(GpuRegister rt, GpuRegister rs, uint16_t imm16);
187 void Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16);
188 void Ld(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
189 void Lbu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
[all...] |
| assembler_mips64.cc | 183 void Mips64Assembler::Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) {
184 EmitI(0x9, rs, rt, imm16);
191 void Mips64Assembler::Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) {
192 EmitI(0x19, rs, rt, imm16);
255 void Mips64Assembler::Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16) {
256 EmitI(0xc, rs, rt, imm16);
263 void Mips64Assembler::Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16) {
264 EmitI(0xd, rs, rt, imm16);
271 void Mips64Assembler::Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16) {
272 EmitI(0xe, rs, rt, imm16);
[all...] |
| /toolchain/binutils/binutils-2.25/gas/doc/ |
| c-z8k.texi | 264 add rd,imm16 com addr(rd) dec addr(rd),imm4m1
271 addl rrd,@@rs cp @@rd,imm16 di i2
272 addl rrd,addr cp addr(rd),imm16 div rrd,@@rs
273 addl rrd,addr(rs) cp addr,imm16 div rrd,addr
275 addl rrd,rrs cp rd,addr div rrd,imm16
277 and rd,addr cp rd,imm16 divl rqd,@@rs
279 and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs)
301 clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16
303 clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
307 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm1
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| cr16-opc.c | 32 /* opc8 imm16 r */ \
37 /* For Logical operations, allow unsigned imm16 also. */
39 /* opc8 imm16 r */ \
44 ARITH1_BYTE_INST ("andb", 0x20, imm16),
46 ARITH1_BYTE_INST ("andw", 0x22, imm16),
49 ARITH1_BYTE_INST ("orb", 0x24, imm16),
51 ARITH1_BYTE_INST ("orw", 0x26, imm16),
54 ARITH1_BYTE_INST ("xorb", 0x28, imm16),
56 ARITH1_BYTE_INST ("xorw", 0x2A, imm16),
58 ARITH_BYTE_INST ("addub", 0x2C, imm16),
[all...] |
| h8500-opc.h | 139 #define IMM16 33
164 {101,'m','I','!','E',O_MOV|O_WORD,"mov.w",2,{IMM16,ABS16},6, {{0x1d,0xff, },
168 {0x00,0x00,IMM16 },{0x00,0x00, }}},*/
170 {1,'s','E','C','C',O_XORC|O_WORD,"xorc.w",2,{IMM16,CRW},4, {{0x0c,0xff,0 },{0x00,0x00,IMM16 },{0x00,0x00,0 },{0x68,0xf8,CRW }}},
179 {3,'m','E','D','D',O_XOR|O_WORD,"xor.w",2,{IMM16,RD},4, {{0x0c,0xff,0 },{0x00,0x00,IMM16 },{0x00,0x00,0 },{0x60,0xf8,RD }}},
196 {5,'m','E','D','D',O_XOR|O_UNSZ,"xor",2,{IMM16,RD},4, {{0x0c,0xff,0 },{0x00,0x00,IMM16 },{0x00,0x00,0 },{0x60,0xf8,RD }}},
209 {9,'a','E','!','!',O_TST|O_WORD,"tst.w",1,{IMM16,0},4, {{0x0c,0xff,0 },{0x00,0x00,IMM16 },{0x00,0x00,0 },{0x16,0xff,0 }}}
[all...] |
| xstormy16-opc.c | 175 /* mov$ws2 $lmem8,#$imm16 */
178 { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } },
181 /* mov$ws2 $hmem8,#$imm16 */
184 { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', '#', OP (IMM16), 0 } },
301 /* mov.w $Rd,#$imm16 */
304 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
397 /* mask $Rd,#$imm16 */
400 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
445 /* and $Rd,#$imm16 */
448 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } }
[all...] |
| dlx-dis.c | 40 unsigned long imm26, imm16, func, current_insn_addr; variable
215 (*info->fprintf_func) (info->stream, "0x%04x", (int)imm16);
222 (*info->fprintf_func) (info->stream, "0x%04x[r%d]", (int)imm16, (int)rs1);
256 (*info->fprintf_func) (info->stream, "0x%04x[r%d],", (int)imm16, (int)rs1);
314 (*info->fprintf_func) (info->stream, "0x%04x", (int)imm16);
344 if (imm16 & 0x00008000)
345 imm16 |= 0xFFFF0000;
347 imm16 += (current_insn_addr + 4);
351 (*info->fprintf_func) (info->stream, "0x%08x", (int) imm16);
468 imm16= dlx_get_imm16 (insn_word)
[all...] |
| z8kgen.c | 92 {"CZSV--", 7, 16, "0000 0001 0000 dddd imm16", "add rd,imm16", 0},
108 {"-ZS---", 7, 16, "0000 0111 0000 dddd imm16", "and rd,imm16", 0},
151 {"CZSV--", 11, 16, "0000 1101 ddN0 0001 imm16", "cp @rd,imm16", 0},
152 {"CZSV--", 15, 16, "0100 1101 ddN0 0001 address_dst imm16", "cp address_dst(rd),imm16", 0},
153 {"CZSV--", 14, 16, "0100 1101 0000 0001 address_dst imm16", "cp address_dst,imm16", 0}
[all...] |
| z8k-opc.h | 343 /* 0000 0001 0000 dddd imm16 *** add rd,imm16 */
346 "add rd,imm16",16,7,0x3c,
463 /* 0000 0111 0000 dddd imm16 *** and rd,imm16 */
466 "and rd,imm16",16,7,0x18,
783 /* 0000 1101 ddN0 0001 imm16 *** cp @rd,imm16 */
786 "cp @rd,imm16",16,11,0x3c,
791 /* 0100 1101 ddN0 0001 address_dst imm16 *** cp address_dst(rd),imm16 *
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| xstormy16.cpu | 316 (dnf f-imm16 "16 bit" (SIGN-OPT) 16 16)
318 (name imm16)
322 (index f-imm16)
557 ("mov$ws2 $lmem8,#$imm16")
558 (+ OP1_7 OP2A_8 ws2 lmem8 imm16)
560 (set-mem-psw (mem HI (and lmem8 #xFFFE)) imm16 ws2)
561 (set-mem-psw (mem QI lmem8) (and imm16 #xFF) ws2))
567 ("mov$ws2 $hmem8,#$imm16")
568 (+ OP1_7 OP2A_A ws2 hmem8 imm16)
570 (set-mem-psw (mem HI (and hmem8 #xFFFE)) imm16 ws2
[all...] |
| mt.cpu | 166 ; f-imm16: 16 bit immediate value when not an offset.
423 (define-operand (name imm16) (comment "immediate value - sign extd") (attrs)
424 (type h-sint) (index f-imm16s) (handlers (parse "imm16") (print "dollarhex")))
426 (type h-uint) (index f-imm16u) (handlers (parse "imm16") (print "dollarhex")))
428 (type h-uint) (index f-imm16s) (handlers (parse "imm16") (print "pcrel")))
610 "addi $frdr,$frsr1,#$imm16"
611 (+ MSYS_NO OPC_ADD IMM_YES frsr1 frdr imm16)
613 (set HI tmp (and imm16 #xffff))
645 "subi $frdr,$frsr1,#$imm16"
646 (+ MSYS_NO OPC_SUB IMM_YES frsr1 frdr imm16)
[all...] |
| /external/ltrace/sysdeps/linux-gnu/aarch64/ |
| arch.h | 24 * | 1 1 0 1 0 1 0 0 0 0 1 | imm16 | 0 0 0 0 0 | */
|
| /external/valgrind/none/tests/x86/ |
| insn_basic.def | 35 adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
36 adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
37 adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
38 adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
39 adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
40 adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
68 addw imm16[1234] ax.uw[5678] => 1.uw[6912]
69 addw imm16[1234] bx.uw[5678] => 1.uw[6912]
70 addw imm16[1234] m16.uw[5678] => 1.uw[6912]
88 andw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x0230
[all...] |
| /toolchain/binutils/binutils-2.25/include/elf/ |
| epiphany.h | 45 depositing it into the IMM16 field of a destination. */
|
