1 //===-- Mips16FrameLowering.cpp - Mips16 Frame Information ----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the Mips16 implementation of TargetFrameLowering class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "Mips16FrameLowering.h" 15 #include "MCTargetDesc/MipsBaseInfo.h" 16 #include "Mips16InstrInfo.h" 17 #include "MipsInstrInfo.h" 18 #include "MipsRegisterInfo.h" 19 #include "MipsSubtarget.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineFunction.h" 22 #include "llvm/CodeGen/MachineInstrBuilder.h" 23 #include "llvm/CodeGen/MachineModuleInfo.h" 24 #include "llvm/CodeGen/MachineRegisterInfo.h" 25 #include "llvm/IR/DataLayout.h" 26 #include "llvm/IR/Function.h" 27 #include "llvm/Support/CommandLine.h" 28 #include "llvm/Target/TargetOptions.h" 29 30 using namespace llvm; 31 32 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI) 33 : MipsFrameLowering(STI, STI.stackAlignment()) {} 34 35 void Mips16FrameLowering::emitPrologue(MachineFunction &MF, 36 MachineBasicBlock &MBB) const { 37 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); 38 MachineFrameInfo *MFI = MF.getFrameInfo(); 39 const Mips16InstrInfo &TII = 40 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 41 MachineBasicBlock::iterator MBBI = MBB.begin(); 42 43 // Debug location must be unknown since the first debug location is used 44 // to determine the end of the prologue. 45 DebugLoc dl; 46 47 uint64_t StackSize = MFI->getStackSize(); 48 49 // No need to allocate space on the stack. 50 if (StackSize == 0 && !MFI->adjustsStack()) return; 51 52 MachineModuleInfo &MMI = MF.getMMI(); 53 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 54 MachineLocation DstML, SrcML; 55 56 // Adjust stack. 57 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI); 58 59 // emit ".cfi_def_cfa_offset StackSize" 60 unsigned CFIIndex = MMI.addFrameInst( 61 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize)); 62 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 63 .addCFIIndex(CFIIndex); 64 65 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 66 67 if (CSI.size()) { 68 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 69 70 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), 71 E = CSI.end(); I != E; ++I) { 72 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx()); 73 unsigned Reg = I->getReg(); 74 unsigned DReg = MRI->getDwarfRegNum(Reg, true); 75 unsigned CFIIndex = MMI.addFrameInst( 76 MCCFIInstruction::createOffset(nullptr, DReg, Offset)); 77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 78 .addCFIIndex(CFIIndex); 79 } 80 } 81 if (hasFP(MF)) 82 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) 83 .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup); 84 85 } 86 87 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF, 88 MachineBasicBlock &MBB) const { 89 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); 90 MachineFrameInfo *MFI = MF.getFrameInfo(); 91 const Mips16InstrInfo &TII = 92 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 93 DebugLoc dl = MBBI->getDebugLoc(); 94 uint64_t StackSize = MFI->getStackSize(); 95 96 if (!StackSize) 97 return; 98 99 if (hasFP(MF)) 100 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP) 101 .addReg(Mips::S0); 102 103 // Adjust stack. 104 // assumes stacksize multiple of 8 105 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI); 106 } 107 108 bool Mips16FrameLowering:: 109 spillCalleeSavedRegisters(MachineBasicBlock &MBB, 110 MachineBasicBlock::iterator MI, 111 const std::vector<CalleeSavedInfo> &CSI, 112 const TargetRegisterInfo *TRI) const { 113 MachineFunction *MF = MBB.getParent(); 114 MachineBasicBlock *EntryBlock = &MF->front(); 115 116 // 117 // Registers RA, S0,S1 are the callee saved registers and they 118 // will be saved with the "save" instruction 119 // during emitPrologue 120 // 121 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 122 // Add the callee-saved register as live-in. Do not add if the register is 123 // RA and return address is taken, because it has already been added in 124 // method MipsTargetLowering::LowerRETURNADDR. 125 // It's killed at the spill, unless the register is RA and return address 126 // is taken. 127 unsigned Reg = CSI[i].getReg(); 128 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA) 129 && MF->getFrameInfo()->isReturnAddressTaken(); 130 if (!IsRAAndRetAddrIsTaken) 131 EntryBlock->addLiveIn(Reg); 132 } 133 134 return true; 135 } 136 137 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 138 MachineBasicBlock::iterator MI, 139 const std::vector<CalleeSavedInfo> &CSI, 140 const TargetRegisterInfo *TRI) const { 141 // 142 // Registers RA,S0,S1 are the callee saved registers and they will be restored 143 // with the restore instruction during emitEpilogue. 144 // We need to override this virtual function, otherwise llvm will try and 145 // restore the registers on it's on from the stack. 146 // 147 148 return true; 149 } 150 151 bool 152 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 153 const MachineFrameInfo *MFI = MF.getFrameInfo(); 154 // Reserve call frame if the size of the maximum call frame fits into 15-bit 155 // immediate field and there are no variable sized objects on the stack. 156 return isInt<15>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects(); 157 } 158 159 void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF, 160 BitVector &SavedRegs, 161 RegScavenger *RS) const { 162 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); 163 const Mips16InstrInfo &TII = 164 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 165 const MipsRegisterInfo &RI = TII.getRegisterInfo(); 166 const BitVector Reserved = RI.getReservedRegs(MF); 167 bool SaveS2 = Reserved[Mips::S2]; 168 if (SaveS2) 169 SavedRegs.set(Mips::S2); 170 if (hasFP(MF)) 171 SavedRegs.set(Mips::S0); 172 } 173 174 const MipsFrameLowering * 175 llvm::createMips16FrameLowering(const MipsSubtarget &ST) { 176 return new Mips16FrameLowering(ST); 177 } 178
