Home | History | Annotate | Download | only in Target 
      1 //===-- llvm/Target/TargetCallingConv.h - Calling Convention ----*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines types for working with calling-convention information.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_TARGET_TARGETCALLINGCONV_H
     15 #define LLVM_TARGET_TARGETCALLINGCONV_H
     16 
     17 #include "llvm/CodeGen/ValueTypes.h"
     18 #include "llvm/Support/DataTypes.h"
     19 #include "llvm/Support/MathExtras.h"
     20 #include <string>
     21 #include <limits.h>
     22 
     23 namespace llvm {
     24 
     25 namespace ISD {
     26   struct ArgFlagsTy {
     27   private:
     28     static const uint64_t NoFlagSet      = 0ULL;
     29     static const uint64_t ZExt           = 1ULL<<0;  ///< Zero extended
     30     static const uint64_t ZExtOffs       = 0;
     31     static const uint64_t SExt           = 1ULL<<1;  ///< Sign extended
     32     static const uint64_t SExtOffs       = 1;
     33     static const uint64_t InReg          = 1ULL<<2;  ///< Passed in register
     34     static const uint64_t InRegOffs      = 2;
     35     static const uint64_t SRet           = 1ULL<<3;  ///< Hidden struct-ret ptr
     36     static const uint64_t SRetOffs       = 3;
     37     static const uint64_t ByVal          = 1ULL<<4;  ///< Struct passed by value
     38     static const uint64_t ByValOffs      = 4;
     39     static const uint64_t Nest           = 1ULL<<5;  ///< Nested fn static chain
     40     static const uint64_t NestOffs       = 5;
     41     static const uint64_t Returned       = 1ULL<<6;  ///< Always returned
     42     static const uint64_t ReturnedOffs   = 6;
     43     static const uint64_t ByValAlign     = 0xFULL<<7; ///< Struct alignment
     44     static const uint64_t ByValAlignOffs = 7;
     45     static const uint64_t Split          = 1ULL<<11;
     46     static const uint64_t SplitOffs      = 11;
     47     static const uint64_t InAlloca       = 1ULL<<12; ///< Passed with inalloca
     48     static const uint64_t InAllocaOffs   = 12;
     49     static const uint64_t OrigAlign      = 0x1FULL<<27;
     50     static const uint64_t OrigAlignOffs  = 27;
     51     static const uint64_t ByValSize      = 0x3fffffffULL<<32; ///< Struct size
     52     static const uint64_t ByValSizeOffs  = 32;
     53     static const uint64_t InConsecutiveRegsLast      = 0x1ULL<<62; ///< Struct size
     54     static const uint64_t InConsecutiveRegsLastOffs  = 62;
     55     static const uint64_t InConsecutiveRegs      = 0x1ULL<<63; ///< Struct size
     56     static const uint64_t InConsecutiveRegsOffs  = 63;
     57 
     58     static const uint64_t One            = 1ULL; ///< 1 of this type, for shifts
     59 
     60     uint64_t Flags;
     61   public:
     62     ArgFlagsTy() : Flags(0) { }
     63 
     64     bool isZExt()      const { return Flags & ZExt; }
     65     void setZExt()     { Flags |= One << ZExtOffs; }
     66 
     67     bool isSExt()      const { return Flags & SExt; }
     68     void setSExt()     { Flags |= One << SExtOffs; }
     69 
     70     bool isInReg()     const { return Flags & InReg; }
     71     void setInReg()    { Flags |= One << InRegOffs; }
     72 
     73     bool isSRet()      const { return Flags & SRet; }
     74     void setSRet()     { Flags |= One << SRetOffs; }
     75 
     76     bool isByVal()     const { return Flags & ByVal; }
     77     void setByVal()    { Flags |= One << ByValOffs; }
     78 
     79     bool isInAlloca()  const { return Flags & InAlloca; }
     80     void setInAlloca() { Flags |= One << InAllocaOffs; }
     81 
     82     bool isNest()      const { return Flags & Nest; }
     83     void setNest()     { Flags |= One << NestOffs; }
     84 
     85     bool isReturned()  const { return Flags & Returned; }
     86     void setReturned() { Flags |= One << ReturnedOffs; }
     87 
     88     bool isInConsecutiveRegs()  const { return Flags & InConsecutiveRegs; }
     89     void setInConsecutiveRegs() { Flags |= One << InConsecutiveRegsOffs; }
     90 
     91     bool isInConsecutiveRegsLast()  const { return Flags & InConsecutiveRegsLast; }
     92     void setInConsecutiveRegsLast() { Flags |= One << InConsecutiveRegsLastOffs; }
     93 
     94     unsigned getByValAlign() const {
     95       return (unsigned)
     96         ((One << ((Flags & ByValAlign) >> ByValAlignOffs)) / 2);
     97     }
     98     void setByValAlign(unsigned A) {
     99       Flags = (Flags & ~ByValAlign) |
    100         (uint64_t(Log2_32(A) + 1) << ByValAlignOffs);
    101     }
    102 
    103     bool isSplit()   const { return Flags & Split; }
    104     void setSplit()  { Flags |= One << SplitOffs; }
    105 
    106     unsigned getOrigAlign() const {
    107       return (unsigned)
    108         ((One << ((Flags & OrigAlign) >> OrigAlignOffs)) / 2);
    109     }
    110     void setOrigAlign(unsigned A) {
    111       Flags = (Flags & ~OrigAlign) |
    112         (uint64_t(Log2_32(A) + 1) << OrigAlignOffs);
    113     }
    114 
    115     unsigned getByValSize() const {
    116       return (unsigned)((Flags & ByValSize) >> ByValSizeOffs);
    117     }
    118     void setByValSize(unsigned S) {
    119       Flags = (Flags & ~ByValSize) | (uint64_t(S) << ByValSizeOffs);
    120     }
    121 
    122     /// getRawBits - Represent the flags as a bunch of bits.
    123     uint64_t getRawBits() const { return Flags; }
    124   };
    125 
    126   /// InputArg - This struct carries flags and type information about a
    127   /// single incoming (formal) argument or incoming (from the perspective
    128   /// of the caller) return value virtual register.
    129   ///
    130   struct InputArg {
    131     ArgFlagsTy Flags;
    132     MVT VT;
    133     EVT ArgVT;
    134     bool Used;
    135 
    136     /// Index original Function's argument.
    137     unsigned OrigArgIndex;
    138     /// Sentinel value for implicit machine-level input arguments.
    139     static const unsigned NoArgIndex = UINT_MAX;
    140 
    141     /// Offset in bytes of current input value relative to the beginning of
    142     /// original argument. E.g. if argument was splitted into four 32 bit
    143     /// registers, we got 4 InputArgs with PartOffsets 0, 4, 8 and 12.
    144     unsigned PartOffset;
    145 
    146     InputArg() : VT(MVT::Other), Used(false) {}
    147     InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
    148              unsigned origIdx, unsigned partOffs)
    149       : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
    150       VT = vt.getSimpleVT();
    151       ArgVT = argvt;
    152     }
    153 
    154     bool isOrigArg() const {
    155       return OrigArgIndex != NoArgIndex;
    156     }
    157 
    158     unsigned getOrigArgIndex() const {
    159       assert(OrigArgIndex != NoArgIndex && "Implicit machine-level argument");
    160       return OrigArgIndex;
    161     }
    162   };
    163 
    164   /// OutputArg - This struct carries flags and a value for a
    165   /// single outgoing (actual) argument or outgoing (from the perspective
    166   /// of the caller) return value virtual register.
    167   ///
    168   struct OutputArg {
    169     ArgFlagsTy Flags;
    170     MVT VT;
    171     EVT ArgVT;
    172 
    173     /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
    174     bool IsFixed;
    175 
    176     /// Index original Function's argument.
    177     unsigned OrigArgIndex;
    178 
    179     /// Offset in bytes of current output value relative to the beginning of
    180     /// original argument. E.g. if argument was splitted into four 32 bit
    181     /// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12.
    182     unsigned PartOffset;
    183 
    184     OutputArg() : IsFixed(false) {}
    185     OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed,
    186               unsigned origIdx, unsigned partOffs)
    187       : Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
    188         PartOffset(partOffs) {
    189       VT = vt.getSimpleVT();
    190       ArgVT = argvt;
    191     }
    192   };
    193 }
    194 
    195 } // end llvm namespace
    196 
    197 #endif
    198