1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This tablegen backend emits a target specifier matcher for converting parsed 11 // assembly operands in the MCInst structures. It also emits a matcher for 12 // custom operand parsing. 13 // 14 // Converting assembly operands into MCInst structures 15 // --------------------------------------------------- 16 // 17 // The input to the target specific matcher is a list of literal tokens and 18 // operands. The target specific parser should generally eliminate any syntax 19 // which is not relevant for matching; for example, comma tokens should have 20 // already been consumed and eliminated by the parser. Most instructions will 21 // end up with a single literal token (the instruction name) and some number of 22 // operands. 23 // 24 // Some example inputs, for X86: 25 // 'addl' (immediate ...) (register ...) 26 // 'add' (immediate ...) (memory ...) 27 // 'call' '*' %epc 28 // 29 // The assembly matcher is responsible for converting this input into a precise 30 // machine instruction (i.e., an instruction with a well defined encoding). This 31 // mapping has several properties which complicate matching: 32 // 33 // - It may be ambiguous; many architectures can legally encode particular 34 // variants of an instruction in different ways (for example, using a smaller 35 // encoding for small immediates). Such ambiguities should never be 36 // arbitrarily resolved by the assembler, the assembler is always responsible 37 // for choosing the "best" available instruction. 38 // 39 // - It may depend on the subtarget or the assembler context. Instructions 40 // which are invalid for the current mode, but otherwise unambiguous (e.g., 41 // an SSE instruction in a file being assembled for i486) should be accepted 42 // and rejected by the assembler front end. However, if the proper encoding 43 // for an instruction is dependent on the assembler context then the matcher 44 // is responsible for selecting the correct machine instruction for the 45 // current mode. 46 // 47 // The core matching algorithm attempts to exploit the regularity in most 48 // instruction sets to quickly determine the set of possibly matching 49 // instructions, and the simplify the generated code. Additionally, this helps 50 // to ensure that the ambiguities are intentionally resolved by the user. 51 // 52 // The matching is divided into two distinct phases: 53 // 54 // 1. Classification: Each operand is mapped to the unique set which (a) 55 // contains it, and (b) is the largest such subset for which a single 56 // instruction could match all members. 57 // 58 // For register classes, we can generate these subgroups automatically. For 59 // arbitrary operands, we expect the user to define the classes and their 60 // relations to one another (for example, 8-bit signed immediates as a 61 // subset of 32-bit immediates). 62 // 63 // By partitioning the operands in this way, we guarantee that for any 64 // tuple of classes, any single instruction must match either all or none 65 // of the sets of operands which could classify to that tuple. 66 // 67 // In addition, the subset relation amongst classes induces a partial order 68 // on such tuples, which we use to resolve ambiguities. 69 // 70 // 2. The input can now be treated as a tuple of classes (static tokens are 71 // simple singleton sets). Each such tuple should generally map to a single 72 // instruction (we currently ignore cases where this isn't true, whee!!!), 73 // which we can emit a simple matcher for. 74 // 75 // Custom Operand Parsing 76 // ---------------------- 77 // 78 // Some targets need a custom way to parse operands, some specific instructions 79 // can contain arguments that can represent processor flags and other kinds of 80 // identifiers that need to be mapped to specific values in the final encoded 81 // instructions. The target specific custom operand parsing works in the 82 // following way: 83 // 84 // 1. A operand match table is built, each entry contains a mnemonic, an 85 // operand class, a mask for all operand positions for that same 86 // class/mnemonic and target features to be checked while trying to match. 87 // 88 // 2. The operand matcher will try every possible entry with the same 89 // mnemonic and will check if the target feature for this mnemonic also 90 // matches. After that, if the operand to be matched has its index 91 // present in the mask, a successful match occurs. Otherwise, fallback 92 // to the regular operand parsing. 93 // 94 // 3. For a match success, each operand class that has a 'ParserMethod' 95 // becomes part of a switch from where the custom method is called. 96 // 97 //===----------------------------------------------------------------------===// 98 99 #include "CodeGenTarget.h" 100 #include "llvm/ADT/PointerUnion.h" 101 #include "llvm/ADT/STLExtras.h" 102 #include "llvm/ADT/SmallPtrSet.h" 103 #include "llvm/ADT/SmallVector.h" 104 #include "llvm/ADT/StringExtras.h" 105 #include "llvm/Support/CommandLine.h" 106 #include "llvm/Support/Debug.h" 107 #include "llvm/Support/ErrorHandling.h" 108 #include "llvm/TableGen/Error.h" 109 #include "llvm/TableGen/Record.h" 110 #include "llvm/TableGen/StringMatcher.h" 111 #include "llvm/TableGen/StringToOffsetTable.h" 112 #include "llvm/TableGen/TableGenBackend.h" 113 #include <cassert> 114 #include <cctype> 115 #include <map> 116 #include <set> 117 #include <sstream> 118 #include <forward_list> 119 using namespace llvm; 120 121 #define DEBUG_TYPE "asm-matcher-emitter" 122 123 static cl::opt<std::string> 124 MatchPrefix("match-prefix", cl::init(""), 125 cl::desc("Only match instructions with the given prefix")); 126 127 namespace { 128 class AsmMatcherInfo; 129 struct SubtargetFeatureInfo; 130 131 // Register sets are used as keys in some second-order sets TableGen creates 132 // when generating its data structures. This means that the order of two 133 // RegisterSets can be seen in the outputted AsmMatcher tables occasionally, and 134 // can even affect compiler output (at least seen in diagnostics produced when 135 // all matches fail). So we use a type that sorts them consistently. 136 typedef std::set<Record*, LessRecordByID> RegisterSet; 137 138 class AsmMatcherEmitter { 139 RecordKeeper &Records; 140 public: 141 AsmMatcherEmitter(RecordKeeper &R) : Records(R) {} 142 143 void run(raw_ostream &o); 144 }; 145 146 /// ClassInfo - Helper class for storing the information about a particular 147 /// class of operands which can be matched. 148 struct ClassInfo { 149 enum ClassInfoKind { 150 /// Invalid kind, for use as a sentinel value. 151 Invalid = 0, 152 153 /// The class for a particular token. 154 Token, 155 156 /// The (first) register class, subsequent register classes are 157 /// RegisterClass0+1, and so on. 158 RegisterClass0, 159 160 /// The (first) user defined class, subsequent user defined classes are 161 /// UserClass0+1, and so on. 162 UserClass0 = 1<<16 163 }; 164 165 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 + 166 /// N) for the Nth user defined class. 167 unsigned Kind; 168 169 /// SuperClasses - The super classes of this class. Note that for simplicities 170 /// sake user operands only record their immediate super class, while register 171 /// operands include all superclasses. 172 std::vector<ClassInfo*> SuperClasses; 173 174 /// Name - The full class name, suitable for use in an enum. 175 std::string Name; 176 177 /// ClassName - The unadorned generic name for this class (e.g., Token). 178 std::string ClassName; 179 180 /// ValueName - The name of the value this class represents; for a token this 181 /// is the literal token string, for an operand it is the TableGen class (or 182 /// empty if this is a derived class). 183 std::string ValueName; 184 185 /// PredicateMethod - The name of the operand method to test whether the 186 /// operand matches this class; this is not valid for Token or register kinds. 187 std::string PredicateMethod; 188 189 /// RenderMethod - The name of the operand method to add this operand to an 190 /// MCInst; this is not valid for Token or register kinds. 191 std::string RenderMethod; 192 193 /// ParserMethod - The name of the operand method to do a target specific 194 /// parsing on the operand. 195 std::string ParserMethod; 196 197 /// For register classes: the records for all the registers in this class. 198 RegisterSet Registers; 199 200 /// For custom match classes: the diagnostic kind for when the predicate fails. 201 std::string DiagnosticType; 202 public: 203 /// isRegisterClass() - Check if this is a register class. 204 bool isRegisterClass() const { 205 return Kind >= RegisterClass0 && Kind < UserClass0; 206 } 207 208 /// isUserClass() - Check if this is a user defined class. 209 bool isUserClass() const { 210 return Kind >= UserClass0; 211 } 212 213 /// isRelatedTo - Check whether this class is "related" to \p RHS. Classes 214 /// are related if they are in the same class hierarchy. 215 bool isRelatedTo(const ClassInfo &RHS) const { 216 // Tokens are only related to tokens. 217 if (Kind == Token || RHS.Kind == Token) 218 return Kind == Token && RHS.Kind == Token; 219 220 // Registers classes are only related to registers classes, and only if 221 // their intersection is non-empty. 222 if (isRegisterClass() || RHS.isRegisterClass()) { 223 if (!isRegisterClass() || !RHS.isRegisterClass()) 224 return false; 225 226 RegisterSet Tmp; 227 std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin()); 228 std::set_intersection(Registers.begin(), Registers.end(), 229 RHS.Registers.begin(), RHS.Registers.end(), 230 II, LessRecordByID()); 231 232 return !Tmp.empty(); 233 } 234 235 // Otherwise we have two users operands; they are related if they are in the 236 // same class hierarchy. 237 // 238 // FIXME: This is an oversimplification, they should only be related if they 239 // intersect, however we don't have that information. 240 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!"); 241 const ClassInfo *Root = this; 242 while (!Root->SuperClasses.empty()) 243 Root = Root->SuperClasses.front(); 244 245 const ClassInfo *RHSRoot = &RHS; 246 while (!RHSRoot->SuperClasses.empty()) 247 RHSRoot = RHSRoot->SuperClasses.front(); 248 249 return Root == RHSRoot; 250 } 251 252 /// isSubsetOf - Test whether this class is a subset of \p RHS. 253 bool isSubsetOf(const ClassInfo &RHS) const { 254 // This is a subset of RHS if it is the same class... 255 if (this == &RHS) 256 return true; 257 258 // ... or if any of its super classes are a subset of RHS. 259 for (const ClassInfo *CI : SuperClasses) 260 if (CI->isSubsetOf(RHS)) 261 return true; 262 263 return false; 264 } 265 266 /// operator< - Compare two classes. 267 // FIXME: This ordering seems to be broken. For example: 268 // u64 < i64, i64 < s8, s8 < u64, forming a cycle 269 // u64 is a subset of i64 270 // i64 and s8 are not subsets of each other, so are ordered by name 271 // s8 and u64 are not subsets of each other, so are ordered by name 272 bool operator<(const ClassInfo &RHS) const { 273 if (this == &RHS) 274 return false; 275 276 // Unrelated classes can be ordered by kind. 277 if (!isRelatedTo(RHS)) 278 return Kind < RHS.Kind; 279 280 switch (Kind) { 281 case Invalid: 282 llvm_unreachable("Invalid kind!"); 283 284 default: 285 // This class precedes the RHS if it is a proper subset of the RHS. 286 if (isSubsetOf(RHS)) 287 return true; 288 if (RHS.isSubsetOf(*this)) 289 return false; 290 291 // Otherwise, order by name to ensure we have a total ordering. 292 return ValueName < RHS.ValueName; 293 } 294 } 295 }; 296 297 class AsmVariantInfo { 298 public: 299 std::string TokenizingCharacters; 300 std::string SeparatorCharacters; 301 std::string BreakCharacters; 302 }; 303 304 /// MatchableInfo - Helper class for storing the necessary information for an 305 /// instruction or alias which is capable of being matched. 306 struct MatchableInfo { 307 struct AsmOperand { 308 /// Token - This is the token that the operand came from. 309 StringRef Token; 310 311 /// The unique class instance this operand should match. 312 ClassInfo *Class; 313 314 /// The operand name this is, if anything. 315 StringRef SrcOpName; 316 317 /// The suboperand index within SrcOpName, or -1 for the entire operand. 318 int SubOpIdx; 319 320 /// Whether the token is "isolated", i.e., it is preceded and followed 321 /// by separators. 322 bool IsIsolatedToken; 323 324 /// Register record if this token is singleton register. 325 Record *SingletonReg; 326 327 explicit AsmOperand(bool IsIsolatedToken, StringRef T) 328 : Token(T), Class(nullptr), SubOpIdx(-1), 329 IsIsolatedToken(IsIsolatedToken), SingletonReg(nullptr) {} 330 }; 331 332 /// ResOperand - This represents a single operand in the result instruction 333 /// generated by the match. In cases (like addressing modes) where a single 334 /// assembler operand expands to multiple MCOperands, this represents the 335 /// single assembler operand, not the MCOperand. 336 struct ResOperand { 337 enum { 338 /// RenderAsmOperand - This represents an operand result that is 339 /// generated by calling the render method on the assembly operand. The 340 /// corresponding AsmOperand is specified by AsmOperandNum. 341 RenderAsmOperand, 342 343 /// TiedOperand - This represents a result operand that is a duplicate of 344 /// a previous result operand. 345 TiedOperand, 346 347 /// ImmOperand - This represents an immediate value that is dumped into 348 /// the operand. 349 ImmOperand, 350 351 /// RegOperand - This represents a fixed register that is dumped in. 352 RegOperand 353 } Kind; 354 355 union { 356 /// This is the operand # in the AsmOperands list that this should be 357 /// copied from. 358 unsigned AsmOperandNum; 359 360 /// TiedOperandNum - This is the (earlier) result operand that should be 361 /// copied from. 362 unsigned TiedOperandNum; 363 364 /// ImmVal - This is the immediate value added to the instruction. 365 int64_t ImmVal; 366 367 /// Register - This is the register record. 368 Record *Register; 369 }; 370 371 /// MINumOperands - The number of MCInst operands populated by this 372 /// operand. 373 unsigned MINumOperands; 374 375 static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) { 376 ResOperand X; 377 X.Kind = RenderAsmOperand; 378 X.AsmOperandNum = AsmOpNum; 379 X.MINumOperands = NumOperands; 380 return X; 381 } 382 383 static ResOperand getTiedOp(unsigned TiedOperandNum) { 384 ResOperand X; 385 X.Kind = TiedOperand; 386 X.TiedOperandNum = TiedOperandNum; 387 X.MINumOperands = 1; 388 return X; 389 } 390 391 static ResOperand getImmOp(int64_t Val) { 392 ResOperand X; 393 X.Kind = ImmOperand; 394 X.ImmVal = Val; 395 X.MINumOperands = 1; 396 return X; 397 } 398 399 static ResOperand getRegOp(Record *Reg) { 400 ResOperand X; 401 X.Kind = RegOperand; 402 X.Register = Reg; 403 X.MINumOperands = 1; 404 return X; 405 } 406 }; 407 408 /// AsmVariantID - Target's assembly syntax variant no. 409 int AsmVariantID; 410 411 /// AsmString - The assembly string for this instruction (with variants 412 /// removed), e.g. "movsx $src, $dst". 413 std::string AsmString; 414 415 /// TheDef - This is the definition of the instruction or InstAlias that this 416 /// matchable came from. 417 Record *const TheDef; 418 419 /// DefRec - This is the definition that it came from. 420 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec; 421 422 const CodeGenInstruction *getResultInst() const { 423 if (DefRec.is<const CodeGenInstruction*>()) 424 return DefRec.get<const CodeGenInstruction*>(); 425 return DefRec.get<const CodeGenInstAlias*>()->ResultInst; 426 } 427 428 /// ResOperands - This is the operand list that should be built for the result 429 /// MCInst. 430 SmallVector<ResOperand, 8> ResOperands; 431 432 /// Mnemonic - This is the first token of the matched instruction, its 433 /// mnemonic. 434 StringRef Mnemonic; 435 436 /// AsmOperands - The textual operands that this instruction matches, 437 /// annotated with a class and where in the OperandList they were defined. 438 /// This directly corresponds to the tokenized AsmString after the mnemonic is 439 /// removed. 440 SmallVector<AsmOperand, 8> AsmOperands; 441 442 /// Predicates - The required subtarget features to match this instruction. 443 SmallVector<const SubtargetFeatureInfo *, 4> RequiredFeatures; 444 445 /// ConversionFnKind - The enum value which is passed to the generated 446 /// convertToMCInst to convert parsed operands into an MCInst for this 447 /// function. 448 std::string ConversionFnKind; 449 450 /// If this instruction is deprecated in some form. 451 bool HasDeprecation; 452 453 /// If this is an alias, this is use to determine whether or not to using 454 /// the conversion function defined by the instruction's AsmMatchConverter 455 /// or to use the function generated by the alias. 456 bool UseInstAsmMatchConverter; 457 458 MatchableInfo(const CodeGenInstruction &CGI) 459 : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI), 460 UseInstAsmMatchConverter(true) { 461 } 462 463 MatchableInfo(std::unique_ptr<const CodeGenInstAlias> Alias) 464 : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef), 465 DefRec(Alias.release()), 466 UseInstAsmMatchConverter( 467 TheDef->getValueAsBit("UseInstAsmMatchConverter")) { 468 } 469 470 // Could remove this and the dtor if PointerUnion supported unique_ptr 471 // elements with a dynamic failure/assertion (like the one below) in the case 472 // where it was copied while being in an owning state. 473 MatchableInfo(const MatchableInfo &RHS) 474 : AsmVariantID(RHS.AsmVariantID), AsmString(RHS.AsmString), 475 TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands), 476 Mnemonic(RHS.Mnemonic), AsmOperands(RHS.AsmOperands), 477 RequiredFeatures(RHS.RequiredFeatures), 478 ConversionFnKind(RHS.ConversionFnKind), 479 HasDeprecation(RHS.HasDeprecation), 480 UseInstAsmMatchConverter(RHS.UseInstAsmMatchConverter) { 481 assert(!DefRec.is<const CodeGenInstAlias *>()); 482 } 483 484 ~MatchableInfo() { 485 delete DefRec.dyn_cast<const CodeGenInstAlias*>(); 486 } 487 488 // Two-operand aliases clone from the main matchable, but mark the second 489 // operand as a tied operand of the first for purposes of the assembler. 490 void formTwoOperandAlias(StringRef Constraint); 491 492 void initialize(const AsmMatcherInfo &Info, 493 SmallPtrSetImpl<Record*> &SingletonRegisters, 494 int AsmVariantNo, StringRef RegisterPrefix, 495 AsmVariantInfo const &Variant); 496 497 /// validate - Return true if this matchable is a valid thing to match against 498 /// and perform a bunch of validity checking. 499 bool validate(StringRef CommentDelimiter, bool Hack) const; 500 501 /// findAsmOperand - Find the AsmOperand with the specified name and 502 /// suboperand index. 503 int findAsmOperand(StringRef N, int SubOpIdx) const { 504 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) 505 if (N == AsmOperands[i].SrcOpName && 506 SubOpIdx == AsmOperands[i].SubOpIdx) 507 return i; 508 return -1; 509 } 510 511 /// findAsmOperandNamed - Find the first AsmOperand with the specified name. 512 /// This does not check the suboperand index. 513 int findAsmOperandNamed(StringRef N) const { 514 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) 515 if (N == AsmOperands[i].SrcOpName) 516 return i; 517 return -1; 518 } 519 520 void buildInstructionResultOperands(); 521 void buildAliasResultOperands(); 522 523 /// operator< - Compare two matchables. 524 bool operator<(const MatchableInfo &RHS) const { 525 // The primary comparator is the instruction mnemonic. 526 if (Mnemonic != RHS.Mnemonic) 527 return Mnemonic < RHS.Mnemonic; 528 529 if (AsmOperands.size() != RHS.AsmOperands.size()) 530 return AsmOperands.size() < RHS.AsmOperands.size(); 531 532 // Compare lexicographically by operand. The matcher validates that other 533 // orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith(). 534 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 535 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class) 536 return true; 537 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class) 538 return false; 539 } 540 541 // Give matches that require more features higher precedence. This is useful 542 // because we cannot define AssemblerPredicates with the negation of 543 // processor features. For example, ARM v6 "nop" may be either a HINT or 544 // MOV. With v6, we want to match HINT. The assembler has no way to 545 // predicate MOV under "NoV6", but HINT will always match first because it 546 // requires V6 while MOV does not. 547 if (RequiredFeatures.size() != RHS.RequiredFeatures.size()) 548 return RequiredFeatures.size() > RHS.RequiredFeatures.size(); 549 550 return false; 551 } 552 553 /// couldMatchAmbiguouslyWith - Check whether this matchable could 554 /// ambiguously match the same set of operands as \p RHS (without being a 555 /// strictly superior match). 556 bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) const { 557 // The primary comparator is the instruction mnemonic. 558 if (Mnemonic != RHS.Mnemonic) 559 return false; 560 561 // The number of operands is unambiguous. 562 if (AsmOperands.size() != RHS.AsmOperands.size()) 563 return false; 564 565 // Otherwise, make sure the ordering of the two instructions is unambiguous 566 // by checking that either (a) a token or operand kind discriminates them, 567 // or (b) the ordering among equivalent kinds is consistent. 568 569 // Tokens and operand kinds are unambiguous (assuming a correct target 570 // specific parser). 571 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) 572 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind || 573 AsmOperands[i].Class->Kind == ClassInfo::Token) 574 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class || 575 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class) 576 return false; 577 578 // Otherwise, this operand could commute if all operands are equivalent, or 579 // there is a pair of operands that compare less than and a pair that 580 // compare greater than. 581 bool HasLT = false, HasGT = false; 582 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 583 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class) 584 HasLT = true; 585 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class) 586 HasGT = true; 587 } 588 589 return !(HasLT ^ HasGT); 590 } 591 592 void dump() const; 593 594 private: 595 void tokenizeAsmString(AsmMatcherInfo const &Info, 596 AsmVariantInfo const &Variant); 597 void addAsmOperand(size_t Start, size_t End, 598 std::string const &SeparatorCharacters); 599 }; 600 601 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget 602 /// feature which participates in instruction matching. 603 struct SubtargetFeatureInfo { 604 /// \brief The predicate record for this feature. 605 Record *TheDef; 606 607 /// \brief An unique index assigned to represent this feature. 608 uint64_t Index; 609 610 SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {} 611 612 /// \brief The name of the enumerated constant identifying this feature. 613 std::string getEnumName() const { 614 return "Feature_" + TheDef->getName(); 615 } 616 617 void dump() const { 618 errs() << getEnumName() << " " << Index << "\n"; 619 TheDef->dump(); 620 } 621 }; 622 623 struct OperandMatchEntry { 624 unsigned OperandMask; 625 const MatchableInfo* MI; 626 ClassInfo *CI; 627 628 static OperandMatchEntry create(const MatchableInfo *mi, ClassInfo *ci, 629 unsigned opMask) { 630 OperandMatchEntry X; 631 X.OperandMask = opMask; 632 X.CI = ci; 633 X.MI = mi; 634 return X; 635 } 636 }; 637 638 639 class AsmMatcherInfo { 640 public: 641 /// Tracked Records 642 RecordKeeper &Records; 643 644 /// The tablegen AsmParser record. 645 Record *AsmParser; 646 647 /// Target - The target information. 648 CodeGenTarget &Target; 649 650 /// The classes which are needed for matching. 651 std::forward_list<ClassInfo> Classes; 652 653 /// The information on the matchables to match. 654 std::vector<std::unique_ptr<MatchableInfo>> Matchables; 655 656 /// Info for custom matching operands by user defined methods. 657 std::vector<OperandMatchEntry> OperandMatchInfo; 658 659 /// Map of Register records to their class information. 660 typedef std::map<Record*, ClassInfo*, LessRecordByID> RegisterClassesTy; 661 RegisterClassesTy RegisterClasses; 662 663 /// Map of Predicate records to their subtarget information. 664 std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures; 665 666 /// Map of AsmOperandClass records to their class information. 667 std::map<Record*, ClassInfo*> AsmOperandClasses; 668 669 private: 670 /// Map of token to class information which has already been constructed. 671 std::map<std::string, ClassInfo*> TokenClasses; 672 673 /// Map of RegisterClass records to their class information. 674 std::map<Record*, ClassInfo*> RegisterClassClasses; 675 676 private: 677 /// getTokenClass - Lookup or create the class for the given token. 678 ClassInfo *getTokenClass(StringRef Token); 679 680 /// getOperandClass - Lookup or create the class for the given operand. 681 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI, 682 int SubOpIdx); 683 ClassInfo *getOperandClass(Record *Rec, int SubOpIdx); 684 685 /// buildRegisterClasses - Build the ClassInfo* instances for register 686 /// classes. 687 void buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters); 688 689 /// buildOperandClasses - Build the ClassInfo* instances for user defined 690 /// operand classes. 691 void buildOperandClasses(); 692 693 void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName, 694 unsigned AsmOpIdx); 695 void buildAliasOperandReference(MatchableInfo *II, StringRef OpName, 696 MatchableInfo::AsmOperand &Op); 697 698 public: 699 AsmMatcherInfo(Record *AsmParser, 700 CodeGenTarget &Target, 701 RecordKeeper &Records); 702 703 /// buildInfo - Construct the various tables used during matching. 704 void buildInfo(); 705 706 /// buildOperandMatchInfo - Build the necessary information to handle user 707 /// defined operand parsing methods. 708 void buildOperandMatchInfo(); 709 710 /// getSubtargetFeature - Lookup or create the subtarget feature info for the 711 /// given operand. 712 const SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const { 713 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!"); 714 const auto &I = SubtargetFeatures.find(Def); 715 return I == SubtargetFeatures.end() ? nullptr : &I->second; 716 } 717 718 RecordKeeper &getRecords() const { 719 return Records; 720 } 721 }; 722 723 } // End anonymous namespace 724 725 void MatchableInfo::dump() const { 726 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n"; 727 728 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 729 const AsmOperand &Op = AsmOperands[i]; 730 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - "; 731 errs() << '\"' << Op.Token << "\"\n"; 732 } 733 } 734 735 static std::pair<StringRef, StringRef> 736 parseTwoOperandConstraint(StringRef S, ArrayRef<SMLoc> Loc) { 737 // Split via the '='. 738 std::pair<StringRef, StringRef> Ops = S.split('='); 739 if (Ops.second == "") 740 PrintFatalError(Loc, "missing '=' in two-operand alias constraint"); 741 // Trim whitespace and the leading '$' on the operand names. 742 size_t start = Ops.first.find_first_of('$'); 743 if (start == std::string::npos) 744 PrintFatalError(Loc, "expected '$' prefix on asm operand name"); 745 Ops.first = Ops.first.slice(start + 1, std::string::npos); 746 size_t end = Ops.first.find_last_of(" \t"); 747 Ops.first = Ops.first.slice(0, end); 748 // Now the second operand. 749 start = Ops.second.find_first_of('$'); 750 if (start == std::string::npos) 751 PrintFatalError(Loc, "expected '$' prefix on asm operand name"); 752 Ops.second = Ops.second.slice(start + 1, std::string::npos); 753 end = Ops.second.find_last_of(" \t"); 754 Ops.first = Ops.first.slice(0, end); 755 return Ops; 756 } 757 758 void MatchableInfo::formTwoOperandAlias(StringRef Constraint) { 759 // Figure out which operands are aliased and mark them as tied. 760 std::pair<StringRef, StringRef> Ops = 761 parseTwoOperandConstraint(Constraint, TheDef->getLoc()); 762 763 // Find the AsmOperands that refer to the operands we're aliasing. 764 int SrcAsmOperand = findAsmOperandNamed(Ops.first); 765 int DstAsmOperand = findAsmOperandNamed(Ops.second); 766 if (SrcAsmOperand == -1) 767 PrintFatalError(TheDef->getLoc(), 768 "unknown source two-operand alias operand '" + Ops.first + 769 "'."); 770 if (DstAsmOperand == -1) 771 PrintFatalError(TheDef->getLoc(), 772 "unknown destination two-operand alias operand '" + 773 Ops.second + "'."); 774 775 // Find the ResOperand that refers to the operand we're aliasing away 776 // and update it to refer to the combined operand instead. 777 for (unsigned i = 0, e = ResOperands.size(); i != e; ++i) { 778 ResOperand &Op = ResOperands[i]; 779 if (Op.Kind == ResOperand::RenderAsmOperand && 780 Op.AsmOperandNum == (unsigned)SrcAsmOperand) { 781 Op.AsmOperandNum = DstAsmOperand; 782 break; 783 } 784 } 785 // Remove the AsmOperand for the alias operand. 786 AsmOperands.erase(AsmOperands.begin() + SrcAsmOperand); 787 // Adjust the ResOperand references to any AsmOperands that followed 788 // the one we just deleted. 789 for (unsigned i = 0, e = ResOperands.size(); i != e; ++i) { 790 ResOperand &Op = ResOperands[i]; 791 switch(Op.Kind) { 792 default: 793 // Nothing to do for operands that don't reference AsmOperands. 794 break; 795 case ResOperand::RenderAsmOperand: 796 if (Op.AsmOperandNum > (unsigned)SrcAsmOperand) 797 --Op.AsmOperandNum; 798 break; 799 case ResOperand::TiedOperand: 800 if (Op.TiedOperandNum > (unsigned)SrcAsmOperand) 801 --Op.TiedOperandNum; 802 break; 803 } 804 } 805 } 806 807 /// extractSingletonRegisterForAsmOperand - Extract singleton register, 808 /// if present, from specified token. 809 static void 810 extractSingletonRegisterForAsmOperand(MatchableInfo::AsmOperand &Op, 811 const AsmMatcherInfo &Info, 812 StringRef RegisterPrefix) { 813 StringRef Tok = Op.Token; 814 815 // If this token is not an isolated token, i.e., it isn't separated from 816 // other tokens (e.g. with whitespace), don't interpret it as a register name. 817 if (!Op.IsIsolatedToken) 818 return; 819 820 if (RegisterPrefix.empty()) { 821 std::string LoweredTok = Tok.lower(); 822 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(LoweredTok)) 823 Op.SingletonReg = Reg->TheDef; 824 return; 825 } 826 827 if (!Tok.startswith(RegisterPrefix)) 828 return; 829 830 StringRef RegName = Tok.substr(RegisterPrefix.size()); 831 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName)) 832 Op.SingletonReg = Reg->TheDef; 833 834 // If there is no register prefix (i.e. "%" in "%eax"), then this may 835 // be some random non-register token, just ignore it. 836 return; 837 } 838 839 void MatchableInfo::initialize(const AsmMatcherInfo &Info, 840 SmallPtrSetImpl<Record*> &SingletonRegisters, 841 int AsmVariantNo, StringRef RegisterPrefix, 842 AsmVariantInfo const &Variant) { 843 AsmVariantID = AsmVariantNo; 844 AsmString = 845 CodeGenInstruction::FlattenAsmStringVariants(AsmString, AsmVariantNo); 846 847 tokenizeAsmString(Info, Variant); 848 849 // Compute the require features. 850 for (Record *Predicate : TheDef->getValueAsListOfDefs("Predicates")) 851 if (const SubtargetFeatureInfo *Feature = 852 Info.getSubtargetFeature(Predicate)) 853 RequiredFeatures.push_back(Feature); 854 855 // Collect singleton registers, if used. 856 for (MatchableInfo::AsmOperand &Op : AsmOperands) { 857 extractSingletonRegisterForAsmOperand(Op, Info, RegisterPrefix); 858 if (Record *Reg = Op.SingletonReg) 859 SingletonRegisters.insert(Reg); 860 } 861 862 const RecordVal *DepMask = TheDef->getValue("DeprecatedFeatureMask"); 863 if (!DepMask) 864 DepMask = TheDef->getValue("ComplexDeprecationPredicate"); 865 866 HasDeprecation = 867 DepMask ? !DepMask->getValue()->getAsUnquotedString().empty() : false; 868 } 869 870 /// Append an AsmOperand for the given substring of AsmString. 871 void MatchableInfo::addAsmOperand(size_t Start, size_t End, 872 std::string const &Separators) { 873 StringRef String = AsmString; 874 // Look for separators before and after to figure out is this token is 875 // isolated. Accept '$$' as that's how we escape '$'. 876 bool IsIsolatedToken = 877 (!Start || Separators.find(String[Start - 1]) != StringRef::npos || 878 String.substr(Start - 1, 2) == "$$") && 879 (End >= String.size() || Separators.find(String[End]) != StringRef::npos); 880 AsmOperands.push_back(AsmOperand(IsIsolatedToken, String.slice(Start, End))); 881 } 882 883 /// tokenizeAsmString - Tokenize a simplified assembly string. 884 void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info, 885 AsmVariantInfo const &Variant) { 886 StringRef String = AsmString; 887 unsigned Prev = 0; 888 bool InTok = false; 889 std::string Separators = Variant.TokenizingCharacters + 890 Variant.SeparatorCharacters; 891 for (unsigned i = 0, e = String.size(); i != e; ++i) { 892 if(Variant.BreakCharacters.find(String[i]) != std::string::npos) { 893 if(InTok) { 894 addAsmOperand(Prev, i, Separators); 895 Prev = i; 896 } 897 InTok = true; 898 continue; 899 } 900 if(Variant.TokenizingCharacters.find(String[i]) != std::string::npos) { 901 if(InTok) { 902 addAsmOperand(Prev, i, Separators); 903 InTok = false; 904 } 905 addAsmOperand(i, i + 1, Separators); 906 Prev = i + 1; 907 continue; 908 } 909 if(Variant.SeparatorCharacters.find(String[i]) != std::string::npos) { 910 if(InTok) { 911 addAsmOperand(Prev, i, Separators); 912 InTok = false; 913 } 914 Prev = i + 1; 915 continue; 916 } 917 switch (String[i]) { 918 case '\\': 919 if (InTok) { 920 addAsmOperand(Prev, i, Separators); 921 InTok = false; 922 } 923 ++i; 924 assert(i != String.size() && "Invalid quoted character"); 925 addAsmOperand(i, i + 1, Separators); 926 Prev = i + 1; 927 break; 928 929 case '$': { 930 if (InTok && Prev != i) { 931 addAsmOperand(Prev, i, Separators); 932 InTok = false; 933 } 934 935 // If this isn't "${", start new identifier looking like "$xxx" 936 if (i + 1 == String.size() || String[i + 1] != '{') { 937 Prev = i; 938 break; 939 } 940 941 StringRef::iterator End = std::find(String.begin() + i, String.end(),'}'); 942 assert(End != String.end() && "Missing brace in operand reference!"); 943 size_t EndPos = End - String.begin(); 944 addAsmOperand(i, EndPos+1, Separators); 945 Prev = EndPos + 1; 946 i = EndPos; 947 break; 948 } 949 default: 950 InTok = true; 951 } 952 } 953 if (InTok && Prev != String.size()) 954 addAsmOperand(Prev, StringRef::npos, Separators); 955 956 // The first token of the instruction is the mnemonic, which must be a 957 // simple string, not a $foo variable or a singleton register. 958 if (AsmOperands.empty()) 959 PrintFatalError(TheDef->getLoc(), 960 "Instruction '" + TheDef->getName() + "' has no tokens"); 961 assert(!AsmOperands[0].Token.empty()); 962 if (AsmOperands[0].Token[0] != '$') 963 Mnemonic = AsmOperands[0].Token; 964 } 965 966 bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const { 967 // Reject matchables with no .s string. 968 if (AsmString.empty()) 969 PrintFatalError(TheDef->getLoc(), "instruction with empty asm string"); 970 971 // Reject any matchables with a newline in them, they should be marked 972 // isCodeGenOnly if they are pseudo instructions. 973 if (AsmString.find('\n') != std::string::npos) 974 PrintFatalError(TheDef->getLoc(), 975 "multiline instruction is not valid for the asmparser, " 976 "mark it isCodeGenOnly"); 977 978 // Remove comments from the asm string. We know that the asmstring only 979 // has one line. 980 if (!CommentDelimiter.empty() && 981 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos) 982 PrintFatalError(TheDef->getLoc(), 983 "asmstring for instruction has comment character in it, " 984 "mark it isCodeGenOnly"); 985 986 // Reject matchables with operand modifiers, these aren't something we can 987 // handle, the target should be refactored to use operands instead of 988 // modifiers. 989 // 990 // Also, check for instructions which reference the operand multiple times; 991 // this implies a constraint we would not honor. 992 std::set<std::string> OperandNames; 993 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 994 StringRef Tok = AsmOperands[i].Token; 995 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos) 996 PrintFatalError(TheDef->getLoc(), 997 "matchable with operand modifier '" + Tok + 998 "' not supported by asm matcher. Mark isCodeGenOnly!"); 999 1000 // Verify that any operand is only mentioned once. 1001 // We reject aliases and ignore instructions for now. 1002 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) { 1003 if (!Hack) 1004 PrintFatalError(TheDef->getLoc(), 1005 "ERROR: matchable with tied operand '" + Tok + 1006 "' can never be matched!"); 1007 // FIXME: Should reject these. The ARM backend hits this with $lane in a 1008 // bunch of instructions. It is unclear what the right answer is. 1009 DEBUG({ 1010 errs() << "warning: '" << TheDef->getName() << "': " 1011 << "ignoring instruction with tied operand '" 1012 << Tok << "'\n"; 1013 }); 1014 return false; 1015 } 1016 } 1017 1018 return true; 1019 } 1020 1021 static std::string getEnumNameForToken(StringRef Str) { 1022 std::string Res; 1023 1024 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) { 1025 switch (*it) { 1026 case '*': Res += "_STAR_"; break; 1027 case '%': Res += "_PCT_"; break; 1028 case ':': Res += "_COLON_"; break; 1029 case '!': Res += "_EXCLAIM_"; break; 1030 case '.': Res += "_DOT_"; break; 1031 case '<': Res += "_LT_"; break; 1032 case '>': Res += "_GT_"; break; 1033 case '-': Res += "_MINUS_"; break; 1034 default: 1035 if ((*it >= 'A' && *it <= 'Z') || 1036 (*it >= 'a' && *it <= 'z') || 1037 (*it >= '0' && *it <= '9')) 1038 Res += *it; 1039 else 1040 Res += "_" + utostr((unsigned) *it) + "_"; 1041 } 1042 } 1043 1044 return Res; 1045 } 1046 1047 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) { 1048 ClassInfo *&Entry = TokenClasses[Token]; 1049 1050 if (!Entry) { 1051 Classes.emplace_front(); 1052 Entry = &Classes.front(); 1053 Entry->Kind = ClassInfo::Token; 1054 Entry->ClassName = "Token"; 1055 Entry->Name = "MCK_" + getEnumNameForToken(Token); 1056 Entry->ValueName = Token; 1057 Entry->PredicateMethod = "<invalid>"; 1058 Entry->RenderMethod = "<invalid>"; 1059 Entry->ParserMethod = ""; 1060 Entry->DiagnosticType = ""; 1061 } 1062 1063 return Entry; 1064 } 1065 1066 ClassInfo * 1067 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI, 1068 int SubOpIdx) { 1069 Record *Rec = OI.Rec; 1070 if (SubOpIdx != -1) 1071 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef(); 1072 return getOperandClass(Rec, SubOpIdx); 1073 } 1074 1075 ClassInfo * 1076 AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) { 1077 if (Rec->isSubClassOf("RegisterOperand")) { 1078 // RegisterOperand may have an associated ParserMatchClass. If it does, 1079 // use it, else just fall back to the underlying register class. 1080 const RecordVal *R = Rec->getValue("ParserMatchClass"); 1081 if (!R || !R->getValue()) 1082 PrintFatalError("Record `" + Rec->getName() + 1083 "' does not have a ParserMatchClass!\n"); 1084 1085 if (DefInit *DI= dyn_cast<DefInit>(R->getValue())) { 1086 Record *MatchClass = DI->getDef(); 1087 if (ClassInfo *CI = AsmOperandClasses[MatchClass]) 1088 return CI; 1089 } 1090 1091 // No custom match class. Just use the register class. 1092 Record *ClassRec = Rec->getValueAsDef("RegClass"); 1093 if (!ClassRec) 1094 PrintFatalError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() + 1095 "' has no associated register class!\n"); 1096 if (ClassInfo *CI = RegisterClassClasses[ClassRec]) 1097 return CI; 1098 PrintFatalError(Rec->getLoc(), "register class has no class info!"); 1099 } 1100 1101 1102 if (Rec->isSubClassOf("RegisterClass")) { 1103 if (ClassInfo *CI = RegisterClassClasses[Rec]) 1104 return CI; 1105 PrintFatalError(Rec->getLoc(), "register class has no class info!"); 1106 } 1107 1108 if (!Rec->isSubClassOf("Operand")) 1109 PrintFatalError(Rec->getLoc(), "Operand `" + Rec->getName() + 1110 "' does not derive from class Operand!\n"); 1111 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass"); 1112 if (ClassInfo *CI = AsmOperandClasses[MatchClass]) 1113 return CI; 1114 1115 PrintFatalError(Rec->getLoc(), "operand has no match class!"); 1116 } 1117 1118 struct LessRegisterSet { 1119 bool operator() (const RegisterSet &LHS, const RegisterSet & RHS) const { 1120 // std::set<T> defines its own compariso "operator<", but it 1121 // performs a lexicographical comparison by T's innate comparison 1122 // for some reason. We don't want non-deterministic pointer 1123 // comparisons so use this instead. 1124 return std::lexicographical_compare(LHS.begin(), LHS.end(), 1125 RHS.begin(), RHS.end(), 1126 LessRecordByID()); 1127 } 1128 }; 1129 1130 void AsmMatcherInfo:: 1131 buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) { 1132 const auto &Registers = Target.getRegBank().getRegisters(); 1133 auto &RegClassList = Target.getRegBank().getRegClasses(); 1134 1135 typedef std::set<RegisterSet, LessRegisterSet> RegisterSetSet; 1136 1137 // The register sets used for matching. 1138 RegisterSetSet RegisterSets; 1139 1140 // Gather the defined sets. 1141 for (const CodeGenRegisterClass &RC : RegClassList) 1142 RegisterSets.insert( 1143 RegisterSet(RC.getOrder().begin(), RC.getOrder().end())); 1144 1145 // Add any required singleton sets. 1146 for (Record *Rec : SingletonRegisters) { 1147 RegisterSets.insert(RegisterSet(&Rec, &Rec + 1)); 1148 } 1149 1150 // Introduce derived sets where necessary (when a register does not determine 1151 // a unique register set class), and build the mapping of registers to the set 1152 // they should classify to. 1153 std::map<Record*, RegisterSet> RegisterMap; 1154 for (const CodeGenRegister &CGR : Registers) { 1155 // Compute the intersection of all sets containing this register. 1156 RegisterSet ContainingSet; 1157 1158 for (const RegisterSet &RS : RegisterSets) { 1159 if (!RS.count(CGR.TheDef)) 1160 continue; 1161 1162 if (ContainingSet.empty()) { 1163 ContainingSet = RS; 1164 continue; 1165 } 1166 1167 RegisterSet Tmp; 1168 std::swap(Tmp, ContainingSet); 1169 std::insert_iterator<RegisterSet> II(ContainingSet, 1170 ContainingSet.begin()); 1171 std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II, 1172 LessRecordByID()); 1173 } 1174 1175 if (!ContainingSet.empty()) { 1176 RegisterSets.insert(ContainingSet); 1177 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet)); 1178 } 1179 } 1180 1181 // Construct the register classes. 1182 std::map<RegisterSet, ClassInfo*, LessRegisterSet> RegisterSetClasses; 1183 unsigned Index = 0; 1184 for (const RegisterSet &RS : RegisterSets) { 1185 Classes.emplace_front(); 1186 ClassInfo *CI = &Classes.front(); 1187 CI->Kind = ClassInfo::RegisterClass0 + Index; 1188 CI->ClassName = "Reg" + utostr(Index); 1189 CI->Name = "MCK_Reg" + utostr(Index); 1190 CI->ValueName = ""; 1191 CI->PredicateMethod = ""; // unused 1192 CI->RenderMethod = "addRegOperands"; 1193 CI->Registers = RS; 1194 // FIXME: diagnostic type. 1195 CI->DiagnosticType = ""; 1196 RegisterSetClasses.insert(std::make_pair(RS, CI)); 1197 ++Index; 1198 } 1199 1200 // Find the superclasses; we could compute only the subgroup lattice edges, 1201 // but there isn't really a point. 1202 for (const RegisterSet &RS : RegisterSets) { 1203 ClassInfo *CI = RegisterSetClasses[RS]; 1204 for (const RegisterSet &RS2 : RegisterSets) 1205 if (RS != RS2 && 1206 std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(), 1207 LessRecordByID())) 1208 CI->SuperClasses.push_back(RegisterSetClasses[RS2]); 1209 } 1210 1211 // Name the register classes which correspond to a user defined RegisterClass. 1212 for (const CodeGenRegisterClass &RC : RegClassList) { 1213 // Def will be NULL for non-user defined register classes. 1214 Record *Def = RC.getDef(); 1215 if (!Def) 1216 continue; 1217 ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(), 1218 RC.getOrder().end())]; 1219 if (CI->ValueName.empty()) { 1220 CI->ClassName = RC.getName(); 1221 CI->Name = "MCK_" + RC.getName(); 1222 CI->ValueName = RC.getName(); 1223 } else 1224 CI->ValueName = CI->ValueName + "," + RC.getName(); 1225 1226 RegisterClassClasses.insert(std::make_pair(Def, CI)); 1227 } 1228 1229 // Populate the map for individual registers. 1230 for (std::map<Record*, RegisterSet>::iterator it = RegisterMap.begin(), 1231 ie = RegisterMap.end(); it != ie; ++it) 1232 RegisterClasses[it->first] = RegisterSetClasses[it->second]; 1233 1234 // Name the register classes which correspond to singleton registers. 1235 for (Record *Rec : SingletonRegisters) { 1236 ClassInfo *CI = RegisterClasses[Rec]; 1237 assert(CI && "Missing singleton register class info!"); 1238 1239 if (CI->ValueName.empty()) { 1240 CI->ClassName = Rec->getName(); 1241 CI->Name = "MCK_" + Rec->getName(); 1242 CI->ValueName = Rec->getName(); 1243 } else 1244 CI->ValueName = CI->ValueName + "," + Rec->getName(); 1245 } 1246 } 1247 1248 void AsmMatcherInfo::buildOperandClasses() { 1249 std::vector<Record*> AsmOperands = 1250 Records.getAllDerivedDefinitions("AsmOperandClass"); 1251 1252 // Pre-populate AsmOperandClasses map. 1253 for (Record *Rec : AsmOperands) { 1254 Classes.emplace_front(); 1255 AsmOperandClasses[Rec] = &Classes.front(); 1256 } 1257 1258 unsigned Index = 0; 1259 for (Record *Rec : AsmOperands) { 1260 ClassInfo *CI = AsmOperandClasses[Rec]; 1261 CI->Kind = ClassInfo::UserClass0 + Index; 1262 1263 ListInit *Supers = Rec->getValueAsListInit("SuperClasses"); 1264 for (Init *I : Supers->getValues()) { 1265 DefInit *DI = dyn_cast<DefInit>(I); 1266 if (!DI) { 1267 PrintError(Rec->getLoc(), "Invalid super class reference!"); 1268 continue; 1269 } 1270 1271 ClassInfo *SC = AsmOperandClasses[DI->getDef()]; 1272 if (!SC) 1273 PrintError(Rec->getLoc(), "Invalid super class reference!"); 1274 else 1275 CI->SuperClasses.push_back(SC); 1276 } 1277 CI->ClassName = Rec->getValueAsString("Name"); 1278 CI->Name = "MCK_" + CI->ClassName; 1279 CI->ValueName = Rec->getName(); 1280 1281 // Get or construct the predicate method name. 1282 Init *PMName = Rec->getValueInit("PredicateMethod"); 1283 if (StringInit *SI = dyn_cast<StringInit>(PMName)) { 1284 CI->PredicateMethod = SI->getValue(); 1285 } else { 1286 assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!"); 1287 CI->PredicateMethod = "is" + CI->ClassName; 1288 } 1289 1290 // Get or construct the render method name. 1291 Init *RMName = Rec->getValueInit("RenderMethod"); 1292 if (StringInit *SI = dyn_cast<StringInit>(RMName)) { 1293 CI->RenderMethod = SI->getValue(); 1294 } else { 1295 assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!"); 1296 CI->RenderMethod = "add" + CI->ClassName + "Operands"; 1297 } 1298 1299 // Get the parse method name or leave it as empty. 1300 Init *PRMName = Rec->getValueInit("ParserMethod"); 1301 if (StringInit *SI = dyn_cast<StringInit>(PRMName)) 1302 CI->ParserMethod = SI->getValue(); 1303 1304 // Get the diagnostic type or leave it as empty. 1305 // Get the parse method name or leave it as empty. 1306 Init *DiagnosticType = Rec->getValueInit("DiagnosticType"); 1307 if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType)) 1308 CI->DiagnosticType = SI->getValue(); 1309 1310 ++Index; 1311 } 1312 } 1313 1314 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, 1315 CodeGenTarget &target, 1316 RecordKeeper &records) 1317 : Records(records), AsmParser(asmParser), Target(target) { 1318 } 1319 1320 /// buildOperandMatchInfo - Build the necessary information to handle user 1321 /// defined operand parsing methods. 1322 void AsmMatcherInfo::buildOperandMatchInfo() { 1323 1324 /// Map containing a mask with all operands indices that can be found for 1325 /// that class inside a instruction. 1326 typedef std::map<ClassInfo *, unsigned, less_ptr<ClassInfo>> OpClassMaskTy; 1327 OpClassMaskTy OpClassMask; 1328 1329 for (const auto &MI : Matchables) { 1330 OpClassMask.clear(); 1331 1332 // Keep track of all operands of this instructions which belong to the 1333 // same class. 1334 for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) { 1335 const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i]; 1336 if (Op.Class->ParserMethod.empty()) 1337 continue; 1338 unsigned &OperandMask = OpClassMask[Op.Class]; 1339 OperandMask |= (1 << i); 1340 } 1341 1342 // Generate operand match info for each mnemonic/operand class pair. 1343 for (const auto &OCM : OpClassMask) { 1344 unsigned OpMask = OCM.second; 1345 ClassInfo *CI = OCM.first; 1346 OperandMatchInfo.push_back(OperandMatchEntry::create(MI.get(), CI, 1347 OpMask)); 1348 } 1349 } 1350 } 1351 1352 void AsmMatcherInfo::buildInfo() { 1353 // Build information about all of the AssemblerPredicates. 1354 std::vector<Record*> AllPredicates = 1355 Records.getAllDerivedDefinitions("Predicate"); 1356 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) { 1357 Record *Pred = AllPredicates[i]; 1358 // Ignore predicates that are not intended for the assembler. 1359 if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) 1360 continue; 1361 1362 if (Pred->getName().empty()) 1363 PrintFatalError(Pred->getLoc(), "Predicate has no name!"); 1364 1365 SubtargetFeatures.insert(std::make_pair( 1366 Pred, SubtargetFeatureInfo(Pred, SubtargetFeatures.size()))); 1367 DEBUG(SubtargetFeatures.find(Pred)->second.dump()); 1368 assert(SubtargetFeatures.size() <= 64 && "Too many subtarget features!"); 1369 } 1370 1371 // Parse the instructions; we need to do this first so that we can gather the 1372 // singleton register classes. 1373 SmallPtrSet<Record*, 16> SingletonRegisters; 1374 unsigned VariantCount = Target.getAsmParserVariantCount(); 1375 for (unsigned VC = 0; VC != VariantCount; ++VC) { 1376 Record *AsmVariant = Target.getAsmParserVariant(VC); 1377 std::string CommentDelimiter = 1378 AsmVariant->getValueAsString("CommentDelimiter"); 1379 std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix"); 1380 AsmVariantInfo Variant; 1381 Variant.TokenizingCharacters = 1382 AsmVariant->getValueAsString("TokenizingCharacters"); 1383 Variant.SeparatorCharacters = 1384 AsmVariant->getValueAsString("SeparatorCharacters"); 1385 Variant.BreakCharacters = 1386 AsmVariant->getValueAsString("BreakCharacters"); 1387 int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); 1388 1389 for (const CodeGenInstruction *CGI : Target.instructions()) { 1390 1391 // If the tblgen -match-prefix option is specified (for tblgen hackers), 1392 // filter the set of instructions we consider. 1393 if (!StringRef(CGI->TheDef->getName()).startswith(MatchPrefix)) 1394 continue; 1395 1396 // Ignore "codegen only" instructions. 1397 if (CGI->TheDef->getValueAsBit("isCodeGenOnly")) 1398 continue; 1399 1400 auto II = llvm::make_unique<MatchableInfo>(*CGI); 1401 1402 II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix, 1403 Variant); 1404 1405 // Ignore instructions which shouldn't be matched and diagnose invalid 1406 // instruction definitions with an error. 1407 if (!II->validate(CommentDelimiter, true)) 1408 continue; 1409 1410 Matchables.push_back(std::move(II)); 1411 } 1412 1413 // Parse all of the InstAlias definitions and stick them in the list of 1414 // matchables. 1415 std::vector<Record*> AllInstAliases = 1416 Records.getAllDerivedDefinitions("InstAlias"); 1417 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) { 1418 auto Alias = llvm::make_unique<CodeGenInstAlias>(AllInstAliases[i], 1419 AsmVariantNo, Target); 1420 1421 // If the tblgen -match-prefix option is specified (for tblgen hackers), 1422 // filter the set of instruction aliases we consider, based on the target 1423 // instruction. 1424 if (!StringRef(Alias->ResultInst->TheDef->getName()) 1425 .startswith( MatchPrefix)) 1426 continue; 1427 1428 auto II = llvm::make_unique<MatchableInfo>(std::move(Alias)); 1429 1430 II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix, 1431 Variant); 1432 1433 // Validate the alias definitions. 1434 II->validate(CommentDelimiter, false); 1435 1436 Matchables.push_back(std::move(II)); 1437 } 1438 } 1439 1440 // Build info for the register classes. 1441 buildRegisterClasses(SingletonRegisters); 1442 1443 // Build info for the user defined assembly operand classes. 1444 buildOperandClasses(); 1445 1446 // Build the information about matchables, now that we have fully formed 1447 // classes. 1448 std::vector<std::unique_ptr<MatchableInfo>> NewMatchables; 1449 for (auto &II : Matchables) { 1450 // Parse the tokens after the mnemonic. 1451 // Note: buildInstructionOperandReference may insert new AsmOperands, so 1452 // don't precompute the loop bound. 1453 for (unsigned i = 0; i != II->AsmOperands.size(); ++i) { 1454 MatchableInfo::AsmOperand &Op = II->AsmOperands[i]; 1455 StringRef Token = Op.Token; 1456 1457 // Check for singleton registers. 1458 if (Record *RegRecord = II->AsmOperands[i].SingletonReg) { 1459 Op.Class = RegisterClasses[RegRecord]; 1460 assert(Op.Class && Op.Class->Registers.size() == 1 && 1461 "Unexpected class for singleton register"); 1462 continue; 1463 } 1464 1465 // Check for simple tokens. 1466 if (Token[0] != '$') { 1467 Op.Class = getTokenClass(Token); 1468 continue; 1469 } 1470 1471 if (Token.size() > 1 && isdigit(Token[1])) { 1472 Op.Class = getTokenClass(Token); 1473 continue; 1474 } 1475 1476 // Otherwise this is an operand reference. 1477 StringRef OperandName; 1478 if (Token[1] == '{') 1479 OperandName = Token.substr(2, Token.size() - 3); 1480 else 1481 OperandName = Token.substr(1); 1482 1483 if (II->DefRec.is<const CodeGenInstruction*>()) 1484 buildInstructionOperandReference(II.get(), OperandName, i); 1485 else 1486 buildAliasOperandReference(II.get(), OperandName, Op); 1487 } 1488 1489 if (II->DefRec.is<const CodeGenInstruction*>()) { 1490 II->buildInstructionResultOperands(); 1491 // If the instruction has a two-operand alias, build up the 1492 // matchable here. We'll add them in bulk at the end to avoid 1493 // confusing this loop. 1494 std::string Constraint = 1495 II->TheDef->getValueAsString("TwoOperandAliasConstraint"); 1496 if (Constraint != "") { 1497 // Start by making a copy of the original matchable. 1498 auto AliasII = llvm::make_unique<MatchableInfo>(*II); 1499 1500 // Adjust it to be a two-operand alias. 1501 AliasII->formTwoOperandAlias(Constraint); 1502 1503 // Add the alias to the matchables list. 1504 NewMatchables.push_back(std::move(AliasII)); 1505 } 1506 } else 1507 II->buildAliasResultOperands(); 1508 } 1509 if (!NewMatchables.empty()) 1510 Matchables.insert(Matchables.end(), 1511 std::make_move_iterator(NewMatchables.begin()), 1512 std::make_move_iterator(NewMatchables.end())); 1513 1514 // Process token alias definitions and set up the associated superclass 1515 // information. 1516 std::vector<Record*> AllTokenAliases = 1517 Records.getAllDerivedDefinitions("TokenAlias"); 1518 for (unsigned i = 0, e = AllTokenAliases.size(); i != e; ++i) { 1519 Record *Rec = AllTokenAliases[i]; 1520 ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken")); 1521 ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken")); 1522 if (FromClass == ToClass) 1523 PrintFatalError(Rec->getLoc(), 1524 "error: Destination value identical to source value."); 1525 FromClass->SuperClasses.push_back(ToClass); 1526 } 1527 1528 // Reorder classes so that classes precede super classes. 1529 Classes.sort(); 1530 } 1531 1532 /// buildInstructionOperandReference - The specified operand is a reference to a 1533 /// named operand such as $src. Resolve the Class and OperandInfo pointers. 1534 void AsmMatcherInfo:: 1535 buildInstructionOperandReference(MatchableInfo *II, 1536 StringRef OperandName, 1537 unsigned AsmOpIdx) { 1538 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>(); 1539 const CGIOperandList &Operands = CGI.Operands; 1540 MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx]; 1541 1542 // Map this token to an operand. 1543 unsigned Idx; 1544 if (!Operands.hasOperandNamed(OperandName, Idx)) 1545 PrintFatalError(II->TheDef->getLoc(), 1546 "error: unable to find operand: '" + OperandName + "'"); 1547 1548 // If the instruction operand has multiple suboperands, but the parser 1549 // match class for the asm operand is still the default "ImmAsmOperand", 1550 // then handle each suboperand separately. 1551 if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) { 1552 Record *Rec = Operands[Idx].Rec; 1553 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!"); 1554 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass"); 1555 if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") { 1556 // Insert remaining suboperands after AsmOpIdx in II->AsmOperands. 1557 StringRef Token = Op->Token; // save this in case Op gets moved 1558 for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) { 1559 MatchableInfo::AsmOperand NewAsmOp(/*IsIsolatedToken=*/true, Token); 1560 NewAsmOp.SubOpIdx = SI; 1561 II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp); 1562 } 1563 // Replace Op with first suboperand. 1564 Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved 1565 Op->SubOpIdx = 0; 1566 } 1567 } 1568 1569 // Set up the operand class. 1570 Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx); 1571 1572 // If the named operand is tied, canonicalize it to the untied operand. 1573 // For example, something like: 1574 // (outs GPR:$dst), (ins GPR:$src) 1575 // with an asmstring of 1576 // "inc $src" 1577 // we want to canonicalize to: 1578 // "inc $dst" 1579 // so that we know how to provide the $dst operand when filling in the result. 1580 int OITied = -1; 1581 if (Operands[Idx].MINumOperands == 1) 1582 OITied = Operands[Idx].getTiedRegister(); 1583 if (OITied != -1) { 1584 // The tied operand index is an MIOperand index, find the operand that 1585 // contains it. 1586 std::pair<unsigned, unsigned> Idx = Operands.getSubOperandNumber(OITied); 1587 OperandName = Operands[Idx.first].Name; 1588 Op->SubOpIdx = Idx.second; 1589 } 1590 1591 Op->SrcOpName = OperandName; 1592 } 1593 1594 /// buildAliasOperandReference - When parsing an operand reference out of the 1595 /// matching string (e.g. "movsx $src, $dst"), determine what the class of the 1596 /// operand reference is by looking it up in the result pattern definition. 1597 void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II, 1598 StringRef OperandName, 1599 MatchableInfo::AsmOperand &Op) { 1600 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>(); 1601 1602 // Set up the operand class. 1603 for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i) 1604 if (CGA.ResultOperands[i].isRecord() && 1605 CGA.ResultOperands[i].getName() == OperandName) { 1606 // It's safe to go with the first one we find, because CodeGenInstAlias 1607 // validates that all operands with the same name have the same record. 1608 Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second; 1609 // Use the match class from the Alias definition, not the 1610 // destination instruction, as we may have an immediate that's 1611 // being munged by the match class. 1612 Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(), 1613 Op.SubOpIdx); 1614 Op.SrcOpName = OperandName; 1615 return; 1616 } 1617 1618 PrintFatalError(II->TheDef->getLoc(), 1619 "error: unable to find operand: '" + OperandName + "'"); 1620 } 1621 1622 void MatchableInfo::buildInstructionResultOperands() { 1623 const CodeGenInstruction *ResultInst = getResultInst(); 1624 1625 // Loop over all operands of the result instruction, determining how to 1626 // populate them. 1627 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { 1628 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; 1629 1630 // If this is a tied operand, just copy from the previously handled operand. 1631 int TiedOp = -1; 1632 if (OpInfo.MINumOperands == 1) 1633 TiedOp = OpInfo.getTiedRegister(); 1634 if (TiedOp != -1) { 1635 ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); 1636 continue; 1637 } 1638 1639 // Find out what operand from the asmparser this MCInst operand comes from. 1640 int SrcOperand = findAsmOperandNamed(OpInfo.Name); 1641 if (OpInfo.Name.empty() || SrcOperand == -1) { 1642 // This may happen for operands that are tied to a suboperand of a 1643 // complex operand. Simply use a dummy value here; nobody should 1644 // use this operand slot. 1645 // FIXME: The long term goal is for the MCOperand list to not contain 1646 // tied operands at all. 1647 ResOperands.push_back(ResOperand::getImmOp(0)); 1648 continue; 1649 } 1650 1651 // Check if the one AsmOperand populates the entire operand. 1652 unsigned NumOperands = OpInfo.MINumOperands; 1653 if (AsmOperands[SrcOperand].SubOpIdx == -1) { 1654 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands)); 1655 continue; 1656 } 1657 1658 // Add a separate ResOperand for each suboperand. 1659 for (unsigned AI = 0; AI < NumOperands; ++AI) { 1660 assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI && 1661 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name && 1662 "unexpected AsmOperands for suboperands"); 1663 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1)); 1664 } 1665 } 1666 } 1667 1668 void MatchableInfo::buildAliasResultOperands() { 1669 const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>(); 1670 const CodeGenInstruction *ResultInst = getResultInst(); 1671 1672 // Loop over all operands of the result instruction, determining how to 1673 // populate them. 1674 unsigned AliasOpNo = 0; 1675 unsigned LastOpNo = CGA.ResultInstOperandIndex.size(); 1676 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { 1677 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; 1678 1679 // If this is a tied operand, just copy from the previously handled operand. 1680 int TiedOp = -1; 1681 if (OpInfo->MINumOperands == 1) 1682 TiedOp = OpInfo->getTiedRegister(); 1683 if (TiedOp != -1) { 1684 ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); 1685 continue; 1686 } 1687 1688 // Handle all the suboperands for this operand. 1689 const std::string &OpName = OpInfo->Name; 1690 for ( ; AliasOpNo < LastOpNo && 1691 CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) { 1692 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second; 1693 1694 // Find out what operand from the asmparser that this MCInst operand 1695 // comes from. 1696 switch (CGA.ResultOperands[AliasOpNo].Kind) { 1697 case CodeGenInstAlias::ResultOperand::K_Record: { 1698 StringRef Name = CGA.ResultOperands[AliasOpNo].getName(); 1699 int SrcOperand = findAsmOperand(Name, SubIdx); 1700 if (SrcOperand == -1) 1701 PrintFatalError(TheDef->getLoc(), "Instruction '" + 1702 TheDef->getName() + "' has operand '" + OpName + 1703 "' that doesn't appear in asm string!"); 1704 unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1); 1705 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, 1706 NumOperands)); 1707 break; 1708 } 1709 case CodeGenInstAlias::ResultOperand::K_Imm: { 1710 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm(); 1711 ResOperands.push_back(ResOperand::getImmOp(ImmVal)); 1712 break; 1713 } 1714 case CodeGenInstAlias::ResultOperand::K_Reg: { 1715 Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister(); 1716 ResOperands.push_back(ResOperand::getRegOp(Reg)); 1717 break; 1718 } 1719 } 1720 } 1721 } 1722 } 1723 1724 static unsigned getConverterOperandID(const std::string &Name, 1725 SmallSetVector<std::string, 16> &Table, 1726 bool &IsNew) { 1727 IsNew = Table.insert(Name); 1728 1729 unsigned ID = IsNew ? Table.size() - 1 : 1730 std::find(Table.begin(), Table.end(), Name) - Table.begin(); 1731 1732 assert(ID < Table.size()); 1733 1734 return ID; 1735 } 1736 1737 1738 static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName, 1739 std::vector<std::unique_ptr<MatchableInfo>> &Infos, 1740 raw_ostream &OS) { 1741 SmallSetVector<std::string, 16> OperandConversionKinds; 1742 SmallSetVector<std::string, 16> InstructionConversionKinds; 1743 std::vector<std::vector<uint8_t> > ConversionTable; 1744 size_t MaxRowLength = 2; // minimum is custom converter plus terminator. 1745 1746 // TargetOperandClass - This is the target's operand class, like X86Operand. 1747 std::string TargetOperandClass = Target.getName() + "Operand"; 1748 1749 // Write the convert function to a separate stream, so we can drop it after 1750 // the enum. We'll build up the conversion handlers for the individual 1751 // operand types opportunistically as we encounter them. 1752 std::string ConvertFnBody; 1753 raw_string_ostream CvtOS(ConvertFnBody); 1754 // Start the unified conversion function. 1755 CvtOS << "void " << Target.getName() << ClassName << "::\n" 1756 << "convertToMCInst(unsigned Kind, MCInst &Inst, " 1757 << "unsigned Opcode,\n" 1758 << " const OperandVector" 1759 << " &Operands) {\n" 1760 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n" 1761 << " const uint8_t *Converter = ConversionTable[Kind];\n" 1762 << " Inst.setOpcode(Opcode);\n" 1763 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n" 1764 << " switch (*p) {\n" 1765 << " default: llvm_unreachable(\"invalid conversion entry!\");\n" 1766 << " case CVT_Reg:\n" 1767 << " static_cast<" << TargetOperandClass 1768 << "&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1);\n" 1769 << " break;\n" 1770 << " case CVT_Tied:\n" 1771 << " Inst.addOperand(Inst.getOperand(*(p + 1)));\n" 1772 << " break;\n"; 1773 1774 std::string OperandFnBody; 1775 raw_string_ostream OpOS(OperandFnBody); 1776 // Start the operand number lookup function. 1777 OpOS << "void " << Target.getName() << ClassName << "::\n" 1778 << "convertToMapAndConstraints(unsigned Kind,\n"; 1779 OpOS.indent(27); 1780 OpOS << "const OperandVector &Operands) {\n" 1781 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n" 1782 << " unsigned NumMCOperands = 0;\n" 1783 << " const uint8_t *Converter = ConversionTable[Kind];\n" 1784 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n" 1785 << " switch (*p) {\n" 1786 << " default: llvm_unreachable(\"invalid conversion entry!\");\n" 1787 << " case CVT_Reg:\n" 1788 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1789 << " Operands[*(p + 1)]->setConstraint(\"r\");\n" 1790 << " ++NumMCOperands;\n" 1791 << " break;\n" 1792 << " case CVT_Tied:\n" 1793 << " ++NumMCOperands;\n" 1794 << " break;\n"; 1795 1796 // Pre-populate the operand conversion kinds with the standard always 1797 // available entries. 1798 OperandConversionKinds.insert("CVT_Done"); 1799 OperandConversionKinds.insert("CVT_Reg"); 1800 OperandConversionKinds.insert("CVT_Tied"); 1801 enum { CVT_Done, CVT_Reg, CVT_Tied }; 1802 1803 for (auto &II : Infos) { 1804 // Check if we have a custom match function. 1805 std::string AsmMatchConverter = 1806 II->getResultInst()->TheDef->getValueAsString("AsmMatchConverter"); 1807 if (!AsmMatchConverter.empty() && II->UseInstAsmMatchConverter) { 1808 std::string Signature = "ConvertCustom_" + AsmMatchConverter; 1809 II->ConversionFnKind = Signature; 1810 1811 // Check if we have already generated this signature. 1812 if (!InstructionConversionKinds.insert(Signature)) 1813 continue; 1814 1815 // Remember this converter for the kind enum. 1816 unsigned KindID = OperandConversionKinds.size(); 1817 OperandConversionKinds.insert("CVT_" + 1818 getEnumNameForToken(AsmMatchConverter)); 1819 1820 // Add the converter row for this instruction. 1821 ConversionTable.emplace_back(); 1822 ConversionTable.back().push_back(KindID); 1823 ConversionTable.back().push_back(CVT_Done); 1824 1825 // Add the handler to the conversion driver function. 1826 CvtOS << " case CVT_" 1827 << getEnumNameForToken(AsmMatchConverter) << ":\n" 1828 << " " << AsmMatchConverter << "(Inst, Operands);\n" 1829 << " break;\n"; 1830 1831 // FIXME: Handle the operand number lookup for custom match functions. 1832 continue; 1833 } 1834 1835 // Build the conversion function signature. 1836 std::string Signature = "Convert"; 1837 1838 std::vector<uint8_t> ConversionRow; 1839 1840 // Compute the convert enum and the case body. 1841 MaxRowLength = std::max(MaxRowLength, II->ResOperands.size()*2 + 1 ); 1842 1843 for (unsigned i = 0, e = II->ResOperands.size(); i != e; ++i) { 1844 const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i]; 1845 1846 // Generate code to populate each result operand. 1847 switch (OpInfo.Kind) { 1848 case MatchableInfo::ResOperand::RenderAsmOperand: { 1849 // This comes from something we parsed. 1850 const MatchableInfo::AsmOperand &Op = 1851 II->AsmOperands[OpInfo.AsmOperandNum]; 1852 1853 // Registers are always converted the same, don't duplicate the 1854 // conversion function based on them. 1855 Signature += "__"; 1856 std::string Class; 1857 Class = Op.Class->isRegisterClass() ? "Reg" : Op.Class->ClassName; 1858 Signature += Class; 1859 Signature += utostr(OpInfo.MINumOperands); 1860 Signature += "_" + itostr(OpInfo.AsmOperandNum); 1861 1862 // Add the conversion kind, if necessary, and get the associated ID 1863 // the index of its entry in the vector). 1864 std::string Name = "CVT_" + (Op.Class->isRegisterClass() ? "Reg" : 1865 Op.Class->RenderMethod); 1866 Name = getEnumNameForToken(Name); 1867 1868 bool IsNewConverter = false; 1869 unsigned ID = getConverterOperandID(Name, OperandConversionKinds, 1870 IsNewConverter); 1871 1872 // Add the operand entry to the instruction kind conversion row. 1873 ConversionRow.push_back(ID); 1874 ConversionRow.push_back(OpInfo.AsmOperandNum); 1875 1876 if (!IsNewConverter) 1877 break; 1878 1879 // This is a new operand kind. Add a handler for it to the 1880 // converter driver. 1881 CvtOS << " case " << Name << ":\n" 1882 << " static_cast<" << TargetOperandClass 1883 << "&>(*Operands[*(p + 1)])." << Op.Class->RenderMethod 1884 << "(Inst, " << OpInfo.MINumOperands << ");\n" 1885 << " break;\n"; 1886 1887 // Add a handler for the operand number lookup. 1888 OpOS << " case " << Name << ":\n" 1889 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"; 1890 1891 if (Op.Class->isRegisterClass()) 1892 OpOS << " Operands[*(p + 1)]->setConstraint(\"r\");\n"; 1893 else 1894 OpOS << " Operands[*(p + 1)]->setConstraint(\"m\");\n"; 1895 OpOS << " NumMCOperands += " << OpInfo.MINumOperands << ";\n" 1896 << " break;\n"; 1897 break; 1898 } 1899 case MatchableInfo::ResOperand::TiedOperand: { 1900 // If this operand is tied to a previous one, just copy the MCInst 1901 // operand from the earlier one.We can only tie single MCOperand values. 1902 assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand"); 1903 unsigned TiedOp = OpInfo.TiedOperandNum; 1904 assert(i > TiedOp && "Tied operand precedes its target!"); 1905 Signature += "__Tie" + utostr(TiedOp); 1906 ConversionRow.push_back(CVT_Tied); 1907 ConversionRow.push_back(TiedOp); 1908 break; 1909 } 1910 case MatchableInfo::ResOperand::ImmOperand: { 1911 int64_t Val = OpInfo.ImmVal; 1912 std::string Ty = "imm_" + itostr(Val); 1913 Ty = getEnumNameForToken(Ty); 1914 Signature += "__" + Ty; 1915 1916 std::string Name = "CVT_" + Ty; 1917 bool IsNewConverter = false; 1918 unsigned ID = getConverterOperandID(Name, OperandConversionKinds, 1919 IsNewConverter); 1920 // Add the operand entry to the instruction kind conversion row. 1921 ConversionRow.push_back(ID); 1922 ConversionRow.push_back(0); 1923 1924 if (!IsNewConverter) 1925 break; 1926 1927 CvtOS << " case " << Name << ":\n" 1928 << " Inst.addOperand(MCOperand::createImm(" << Val << "));\n" 1929 << " break;\n"; 1930 1931 OpOS << " case " << Name << ":\n" 1932 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1933 << " Operands[*(p + 1)]->setConstraint(\"\");\n" 1934 << " ++NumMCOperands;\n" 1935 << " break;\n"; 1936 break; 1937 } 1938 case MatchableInfo::ResOperand::RegOperand: { 1939 std::string Reg, Name; 1940 if (!OpInfo.Register) { 1941 Name = "reg0"; 1942 Reg = "0"; 1943 } else { 1944 Reg = getQualifiedName(OpInfo.Register); 1945 Name = "reg" + OpInfo.Register->getName(); 1946 } 1947 Signature += "__" + Name; 1948 Name = "CVT_" + Name; 1949 bool IsNewConverter = false; 1950 unsigned ID = getConverterOperandID(Name, OperandConversionKinds, 1951 IsNewConverter); 1952 // Add the operand entry to the instruction kind conversion row. 1953 ConversionRow.push_back(ID); 1954 ConversionRow.push_back(0); 1955 1956 if (!IsNewConverter) 1957 break; 1958 CvtOS << " case " << Name << ":\n" 1959 << " Inst.addOperand(MCOperand::createReg(" << Reg << "));\n" 1960 << " break;\n"; 1961 1962 OpOS << " case " << Name << ":\n" 1963 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1964 << " Operands[*(p + 1)]->setConstraint(\"m\");\n" 1965 << " ++NumMCOperands;\n" 1966 << " break;\n"; 1967 } 1968 } 1969 } 1970 1971 // If there were no operands, add to the signature to that effect 1972 if (Signature == "Convert") 1973 Signature += "_NoOperands"; 1974 1975 II->ConversionFnKind = Signature; 1976 1977 // Save the signature. If we already have it, don't add a new row 1978 // to the table. 1979 if (!InstructionConversionKinds.insert(Signature)) 1980 continue; 1981 1982 // Add the row to the table. 1983 ConversionTable.push_back(std::move(ConversionRow)); 1984 } 1985 1986 // Finish up the converter driver function. 1987 CvtOS << " }\n }\n}\n\n"; 1988 1989 // Finish up the operand number lookup function. 1990 OpOS << " }\n }\n}\n\n"; 1991 1992 OS << "namespace {\n"; 1993 1994 // Output the operand conversion kind enum. 1995 OS << "enum OperatorConversionKind {\n"; 1996 for (unsigned i = 0, e = OperandConversionKinds.size(); i != e; ++i) 1997 OS << " " << OperandConversionKinds[i] << ",\n"; 1998 OS << " CVT_NUM_CONVERTERS\n"; 1999 OS << "};\n\n"; 2000 2001 // Output the instruction conversion kind enum. 2002 OS << "enum InstructionConversionKind {\n"; 2003 for (const std::string &Signature : InstructionConversionKinds) 2004 OS << " " << Signature << ",\n"; 2005 OS << " CVT_NUM_SIGNATURES\n"; 2006 OS << "};\n\n"; 2007 2008 2009 OS << "} // end anonymous namespace\n\n"; 2010 2011 // Output the conversion table. 2012 OS << "static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][" 2013 << MaxRowLength << "] = {\n"; 2014 2015 for (unsigned Row = 0, ERow = ConversionTable.size(); Row != ERow; ++Row) { 2016 assert(ConversionTable[Row].size() % 2 == 0 && "bad conversion row!"); 2017 OS << " // " << InstructionConversionKinds[Row] << "\n"; 2018 OS << " { "; 2019 for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2) 2020 OS << OperandConversionKinds[ConversionTable[Row][i]] << ", " 2021 << (unsigned)(ConversionTable[Row][i + 1]) << ", "; 2022 OS << "CVT_Done },\n"; 2023 } 2024 2025 OS << "};\n\n"; 2026 2027 // Spit out the conversion driver function. 2028 OS << CvtOS.str(); 2029 2030 // Spit out the operand number lookup function. 2031 OS << OpOS.str(); 2032 } 2033 2034 /// emitMatchClassEnumeration - Emit the enumeration for match class kinds. 2035 static void emitMatchClassEnumeration(CodeGenTarget &Target, 2036 std::forward_list<ClassInfo> &Infos, 2037 raw_ostream &OS) { 2038 OS << "namespace {\n\n"; 2039 2040 OS << "/// MatchClassKind - The kinds of classes which participate in\n" 2041 << "/// instruction matching.\n"; 2042 OS << "enum MatchClassKind {\n"; 2043 OS << " InvalidMatchClass = 0,\n"; 2044 for (const auto &CI : Infos) { 2045 OS << " " << CI.Name << ", // "; 2046 if (CI.Kind == ClassInfo::Token) { 2047 OS << "'" << CI.ValueName << "'\n"; 2048 } else if (CI.isRegisterClass()) { 2049 if (!CI.ValueName.empty()) 2050 OS << "register class '" << CI.ValueName << "'\n"; 2051 else 2052 OS << "derived register class\n"; 2053 } else { 2054 OS << "user defined class '" << CI.ValueName << "'\n"; 2055 } 2056 } 2057 OS << " NumMatchClassKinds\n"; 2058 OS << "};\n\n"; 2059 2060 OS << "}\n\n"; 2061 } 2062 2063 /// emitValidateOperandClass - Emit the function to validate an operand class. 2064 static void emitValidateOperandClass(AsmMatcherInfo &Info, 2065 raw_ostream &OS) { 2066 OS << "static unsigned validateOperandClass(MCParsedAsmOperand &GOp, " 2067 << "MatchClassKind Kind) {\n"; 2068 OS << " " << Info.Target.getName() << "Operand &Operand = (" 2069 << Info.Target.getName() << "Operand&)GOp;\n"; 2070 2071 // The InvalidMatchClass is not to match any operand. 2072 OS << " if (Kind == InvalidMatchClass)\n"; 2073 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n\n"; 2074 2075 // Check for Token operands first. 2076 // FIXME: Use a more specific diagnostic type. 2077 OS << " if (Operand.isToken())\n"; 2078 OS << " return isSubclass(matchTokenString(Operand.getToken()), Kind) ?\n" 2079 << " MCTargetAsmParser::Match_Success :\n" 2080 << " MCTargetAsmParser::Match_InvalidOperand;\n\n"; 2081 2082 // Check the user classes. We don't care what order since we're only 2083 // actually matching against one of them. 2084 for (const auto &CI : Info.Classes) { 2085 if (!CI.isUserClass()) 2086 continue; 2087 2088 OS << " // '" << CI.ClassName << "' class\n"; 2089 OS << " if (Kind == " << CI.Name << ") {\n"; 2090 OS << " if (Operand." << CI.PredicateMethod << "())\n"; 2091 OS << " return MCTargetAsmParser::Match_Success;\n"; 2092 if (!CI.DiagnosticType.empty()) 2093 OS << " return " << Info.Target.getName() << "AsmParser::Match_" 2094 << CI.DiagnosticType << ";\n"; 2095 OS << " }\n\n"; 2096 } 2097 2098 // Check for register operands, including sub-classes. 2099 OS << " if (Operand.isReg()) {\n"; 2100 OS << " MatchClassKind OpKind;\n"; 2101 OS << " switch (Operand.getReg()) {\n"; 2102 OS << " default: OpKind = InvalidMatchClass; break;\n"; 2103 for (const auto &RC : Info.RegisterClasses) 2104 OS << " case " << Info.Target.getName() << "::" 2105 << RC.first->getName() << ": OpKind = " << RC.second->Name 2106 << "; break;\n"; 2107 OS << " }\n"; 2108 OS << " return isSubclass(OpKind, Kind) ? " 2109 << "MCTargetAsmParser::Match_Success :\n " 2110 << " MCTargetAsmParser::Match_InvalidOperand;\n }\n\n"; 2111 2112 // Generic fallthrough match failure case for operands that don't have 2113 // specialized diagnostic types. 2114 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n"; 2115 OS << "}\n\n"; 2116 } 2117 2118 /// emitIsSubclass - Emit the subclass predicate function. 2119 static void emitIsSubclass(CodeGenTarget &Target, 2120 std::forward_list<ClassInfo> &Infos, 2121 raw_ostream &OS) { 2122 OS << "/// isSubclass - Compute whether \\p A is a subclass of \\p B.\n"; 2123 OS << "static bool isSubclass(MatchClassKind A, MatchClassKind B) {\n"; 2124 OS << " if (A == B)\n"; 2125 OS << " return true;\n\n"; 2126 2127 std::string OStr; 2128 raw_string_ostream SS(OStr); 2129 unsigned Count = 0; 2130 SS << " switch (A) {\n"; 2131 SS << " default:\n"; 2132 SS << " return false;\n"; 2133 for (const auto &A : Infos) { 2134 std::vector<StringRef> SuperClasses; 2135 for (const auto &B : Infos) { 2136 if (&A != &B && A.isSubsetOf(B)) 2137 SuperClasses.push_back(B.Name); 2138 } 2139 2140 if (SuperClasses.empty()) 2141 continue; 2142 ++Count; 2143 2144 SS << "\n case " << A.Name << ":\n"; 2145 2146 if (SuperClasses.size() == 1) { 2147 SS << " return B == " << SuperClasses.back().str() << ";\n"; 2148 continue; 2149 } 2150 2151 if (!SuperClasses.empty()) { 2152 SS << " switch (B) {\n"; 2153 SS << " default: return false;\n"; 2154 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i) 2155 SS << " case " << SuperClasses[i].str() << ": return true;\n"; 2156 SS << " }\n"; 2157 } else { 2158 // No case statement to emit 2159 SS << " return false;\n"; 2160 } 2161 } 2162 SS << " }\n"; 2163 2164 // If there were case statements emitted into the string stream, write them 2165 // to the output stream, otherwise write the default. 2166 if (Count) 2167 OS << SS.str(); 2168 else 2169 OS << " return false;\n"; 2170 2171 OS << "}\n\n"; 2172 } 2173 2174 /// emitMatchTokenString - Emit the function to match a token string to the 2175 /// appropriate match class value. 2176 static void emitMatchTokenString(CodeGenTarget &Target, 2177 std::forward_list<ClassInfo> &Infos, 2178 raw_ostream &OS) { 2179 // Construct the match list. 2180 std::vector<StringMatcher::StringPair> Matches; 2181 for (const auto &CI : Infos) { 2182 if (CI.Kind == ClassInfo::Token) 2183 Matches.emplace_back(CI.ValueName, "return " + CI.Name + ";"); 2184 } 2185 2186 OS << "static MatchClassKind matchTokenString(StringRef Name) {\n"; 2187 2188 StringMatcher("Name", Matches, OS).Emit(); 2189 2190 OS << " return InvalidMatchClass;\n"; 2191 OS << "}\n\n"; 2192 } 2193 2194 /// emitMatchRegisterName - Emit the function to match a string to the target 2195 /// specific register enum. 2196 static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser, 2197 raw_ostream &OS) { 2198 // Construct the match list. 2199 std::vector<StringMatcher::StringPair> Matches; 2200 const auto &Regs = Target.getRegBank().getRegisters(); 2201 for (const CodeGenRegister &Reg : Regs) { 2202 if (Reg.TheDef->getValueAsString("AsmName").empty()) 2203 continue; 2204 2205 Matches.emplace_back(Reg.TheDef->getValueAsString("AsmName"), 2206 "return " + utostr(Reg.EnumValue) + ";"); 2207 } 2208 2209 OS << "static unsigned MatchRegisterName(StringRef Name) {\n"; 2210 2211 StringMatcher("Name", Matches, OS).Emit(); 2212 2213 OS << " return 0;\n"; 2214 OS << "}\n\n"; 2215 } 2216 2217 static const char *getMinimalTypeForRange(uint64_t Range) { 2218 assert(Range <= 0xFFFFFFFFFFFFFFFFULL && "Enum too large"); 2219 if (Range > 0xFFFFFFFFULL) 2220 return "uint64_t"; 2221 if (Range > 0xFFFF) 2222 return "uint32_t"; 2223 if (Range > 0xFF) 2224 return "uint16_t"; 2225 return "uint8_t"; 2226 } 2227 2228 static const char *getMinimalRequiredFeaturesType(const AsmMatcherInfo &Info) { 2229 uint64_t MaxIndex = Info.SubtargetFeatures.size(); 2230 if (MaxIndex > 0) 2231 MaxIndex--; 2232 return getMinimalTypeForRange(1ULL << MaxIndex); 2233 } 2234 2235 /// emitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag 2236 /// definitions. 2237 static void emitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info, 2238 raw_ostream &OS) { 2239 OS << "// Flags for subtarget features that participate in " 2240 << "instruction matching.\n"; 2241 OS << "enum SubtargetFeatureFlag : " << getMinimalRequiredFeaturesType(Info) 2242 << " {\n"; 2243 for (const auto &SF : Info.SubtargetFeatures) { 2244 const SubtargetFeatureInfo &SFI = SF.second; 2245 OS << " " << SFI.getEnumName() << " = (1ULL << " << SFI.Index << "),\n"; 2246 } 2247 OS << " Feature_None = 0\n"; 2248 OS << "};\n\n"; 2249 } 2250 2251 /// emitOperandDiagnosticTypes - Emit the operand matching diagnostic types. 2252 static void emitOperandDiagnosticTypes(AsmMatcherInfo &Info, raw_ostream &OS) { 2253 // Get the set of diagnostic types from all of the operand classes. 2254 std::set<StringRef> Types; 2255 for (std::map<Record*, ClassInfo*>::const_iterator 2256 I = Info.AsmOperandClasses.begin(), 2257 E = Info.AsmOperandClasses.end(); I != E; ++I) { 2258 if (!I->second->DiagnosticType.empty()) 2259 Types.insert(I->second->DiagnosticType); 2260 } 2261 2262 if (Types.empty()) return; 2263 2264 // Now emit the enum entries. 2265 for (std::set<StringRef>::const_iterator I = Types.begin(), E = Types.end(); 2266 I != E; ++I) 2267 OS << " Match_" << *I << ",\n"; 2268 OS << " END_OPERAND_DIAGNOSTIC_TYPES\n"; 2269 } 2270 2271 /// emitGetSubtargetFeatureName - Emit the helper function to get the 2272 /// user-level name for a subtarget feature. 2273 static void emitGetSubtargetFeatureName(AsmMatcherInfo &Info, raw_ostream &OS) { 2274 OS << "// User-level names for subtarget features that participate in\n" 2275 << "// instruction matching.\n" 2276 << "static const char *getSubtargetFeatureName(uint64_t Val) {\n"; 2277 if (!Info.SubtargetFeatures.empty()) { 2278 OS << " switch(Val) {\n"; 2279 for (const auto &SF : Info.SubtargetFeatures) { 2280 const SubtargetFeatureInfo &SFI = SF.second; 2281 // FIXME: Totally just a placeholder name to get the algorithm working. 2282 OS << " case " << SFI.getEnumName() << ": return \"" 2283 << SFI.TheDef->getValueAsString("PredicateName") << "\";\n"; 2284 } 2285 OS << " default: return \"(unknown)\";\n"; 2286 OS << " }\n"; 2287 } else { 2288 // Nothing to emit, so skip the switch 2289 OS << " return \"(unknown)\";\n"; 2290 } 2291 OS << "}\n\n"; 2292 } 2293 2294 /// emitComputeAvailableFeatures - Emit the function to compute the list of 2295 /// available features given a subtarget. 2296 static void emitComputeAvailableFeatures(AsmMatcherInfo &Info, 2297 raw_ostream &OS) { 2298 std::string ClassName = 2299 Info.AsmParser->getValueAsString("AsmParserClassName"); 2300 2301 OS << "uint64_t " << Info.Target.getName() << ClassName << "::\n" 2302 << "ComputeAvailableFeatures(const FeatureBitset& FB) const {\n"; 2303 OS << " uint64_t Features = 0;\n"; 2304 for (const auto &SF : Info.SubtargetFeatures) { 2305 const SubtargetFeatureInfo &SFI = SF.second; 2306 2307 OS << " if ("; 2308 std::string CondStorage = 2309 SFI.TheDef->getValueAsString("AssemblerCondString"); 2310 StringRef Conds = CondStorage; 2311 std::pair<StringRef,StringRef> Comma = Conds.split(','); 2312 bool First = true; 2313 do { 2314 if (!First) 2315 OS << " && "; 2316 2317 bool Neg = false; 2318 StringRef Cond = Comma.first; 2319 if (Cond[0] == '!') { 2320 Neg = true; 2321 Cond = Cond.substr(1); 2322 } 2323 2324 OS << "("; 2325 if (Neg) 2326 OS << "!"; 2327 OS << "FB[" << Info.Target.getName() << "::" << Cond << "])"; 2328 2329 if (Comma.second.empty()) 2330 break; 2331 2332 First = false; 2333 Comma = Comma.second.split(','); 2334 } while (true); 2335 2336 OS << ")\n"; 2337 OS << " Features |= " << SFI.getEnumName() << ";\n"; 2338 } 2339 OS << " return Features;\n"; 2340 OS << "}\n\n"; 2341 } 2342 2343 static std::string GetAliasRequiredFeatures(Record *R, 2344 const AsmMatcherInfo &Info) { 2345 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates"); 2346 std::string Result; 2347 unsigned NumFeatures = 0; 2348 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) { 2349 const SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]); 2350 2351 if (!F) 2352 PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() + 2353 "' is not marked as an AssemblerPredicate!"); 2354 2355 if (NumFeatures) 2356 Result += '|'; 2357 2358 Result += F->getEnumName(); 2359 ++NumFeatures; 2360 } 2361 2362 if (NumFeatures > 1) 2363 Result = '(' + Result + ')'; 2364 return Result; 2365 } 2366 2367 static void emitMnemonicAliasVariant(raw_ostream &OS,const AsmMatcherInfo &Info, 2368 std::vector<Record*> &Aliases, 2369 unsigned Indent = 0, 2370 StringRef AsmParserVariantName = StringRef()){ 2371 // Keep track of all the aliases from a mnemonic. Use an std::map so that the 2372 // iteration order of the map is stable. 2373 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic; 2374 2375 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { 2376 Record *R = Aliases[i]; 2377 // FIXME: Allow AssemblerVariantName to be a comma separated list. 2378 std::string AsmVariantName = R->getValueAsString("AsmVariantName"); 2379 if (AsmVariantName != AsmParserVariantName) 2380 continue; 2381 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R); 2382 } 2383 if (AliasesFromMnemonic.empty()) 2384 return; 2385 2386 // Process each alias a "from" mnemonic at a time, building the code executed 2387 // by the string remapper. 2388 std::vector<StringMatcher::StringPair> Cases; 2389 for (std::map<std::string, std::vector<Record*> >::iterator 2390 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end(); 2391 I != E; ++I) { 2392 const std::vector<Record*> &ToVec = I->second; 2393 2394 // Loop through each alias and emit code that handles each case. If there 2395 // are two instructions without predicates, emit an error. If there is one, 2396 // emit it last. 2397 std::string MatchCode; 2398 int AliasWithNoPredicate = -1; 2399 2400 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) { 2401 Record *R = ToVec[i]; 2402 std::string FeatureMask = GetAliasRequiredFeatures(R, Info); 2403 2404 // If this unconditionally matches, remember it for later and diagnose 2405 // duplicates. 2406 if (FeatureMask.empty()) { 2407 if (AliasWithNoPredicate != -1) { 2408 // We can't have two aliases from the same mnemonic with no predicate. 2409 PrintError(ToVec[AliasWithNoPredicate]->getLoc(), 2410 "two MnemonicAliases with the same 'from' mnemonic!"); 2411 PrintFatalError(R->getLoc(), "this is the other MnemonicAlias."); 2412 } 2413 2414 AliasWithNoPredicate = i; 2415 continue; 2416 } 2417 if (R->getValueAsString("ToMnemonic") == I->first) 2418 PrintFatalError(R->getLoc(), "MnemonicAlias to the same string"); 2419 2420 if (!MatchCode.empty()) 2421 MatchCode += "else "; 2422 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n"; 2423 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n"; 2424 } 2425 2426 if (AliasWithNoPredicate != -1) { 2427 Record *R = ToVec[AliasWithNoPredicate]; 2428 if (!MatchCode.empty()) 2429 MatchCode += "else\n "; 2430 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n"; 2431 } 2432 2433 MatchCode += "return;"; 2434 2435 Cases.push_back(std::make_pair(I->first, MatchCode)); 2436 } 2437 StringMatcher("Mnemonic", Cases, OS).Emit(Indent); 2438 } 2439 2440 /// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions, 2441 /// emit a function for them and return true, otherwise return false. 2442 static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info, 2443 CodeGenTarget &Target) { 2444 // Ignore aliases when match-prefix is set. 2445 if (!MatchPrefix.empty()) 2446 return false; 2447 2448 std::vector<Record*> Aliases = 2449 Info.getRecords().getAllDerivedDefinitions("MnemonicAlias"); 2450 if (Aliases.empty()) return false; 2451 2452 OS << "static void applyMnemonicAliases(StringRef &Mnemonic, " 2453 "uint64_t Features, unsigned VariantID) {\n"; 2454 OS << " switch (VariantID) {\n"; 2455 unsigned VariantCount = Target.getAsmParserVariantCount(); 2456 for (unsigned VC = 0; VC != VariantCount; ++VC) { 2457 Record *AsmVariant = Target.getAsmParserVariant(VC); 2458 int AsmParserVariantNo = AsmVariant->getValueAsInt("Variant"); 2459 std::string AsmParserVariantName = AsmVariant->getValueAsString("Name"); 2460 OS << " case " << AsmParserVariantNo << ":\n"; 2461 emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2, 2462 AsmParserVariantName); 2463 OS << " break;\n"; 2464 } 2465 OS << " }\n"; 2466 2467 // Emit aliases that apply to all variants. 2468 emitMnemonicAliasVariant(OS, Info, Aliases); 2469 2470 OS << "}\n\n"; 2471 2472 return true; 2473 } 2474 2475 static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target, 2476 const AsmMatcherInfo &Info, StringRef ClassName, 2477 StringToOffsetTable &StringTable, 2478 unsigned MaxMnemonicIndex) { 2479 unsigned MaxMask = 0; 2480 for (std::vector<OperandMatchEntry>::const_iterator it = 2481 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end(); 2482 it != ie; ++it) { 2483 MaxMask |= it->OperandMask; 2484 } 2485 2486 // Emit the static custom operand parsing table; 2487 OS << "namespace {\n"; 2488 OS << " struct OperandMatchEntry {\n"; 2489 OS << " " << getMinimalRequiredFeaturesType(Info) 2490 << " RequiredFeatures;\n"; 2491 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex) 2492 << " Mnemonic;\n"; 2493 OS << " " << getMinimalTypeForRange(std::distance( 2494 Info.Classes.begin(), Info.Classes.end())) << " Class;\n"; 2495 OS << " " << getMinimalTypeForRange(MaxMask) 2496 << " OperandMask;\n\n"; 2497 OS << " StringRef getMnemonic() const {\n"; 2498 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n"; 2499 OS << " MnemonicTable[Mnemonic]);\n"; 2500 OS << " }\n"; 2501 OS << " };\n\n"; 2502 2503 OS << " // Predicate for searching for an opcode.\n"; 2504 OS << " struct LessOpcodeOperand {\n"; 2505 OS << " bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n"; 2506 OS << " return LHS.getMnemonic() < RHS;\n"; 2507 OS << " }\n"; 2508 OS << " bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n"; 2509 OS << " return LHS < RHS.getMnemonic();\n"; 2510 OS << " }\n"; 2511 OS << " bool operator()(const OperandMatchEntry &LHS,"; 2512 OS << " const OperandMatchEntry &RHS) {\n"; 2513 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n"; 2514 OS << " }\n"; 2515 OS << " };\n"; 2516 2517 OS << "} // end anonymous namespace.\n\n"; 2518 2519 OS << "static const OperandMatchEntry OperandMatchTable[" 2520 << Info.OperandMatchInfo.size() << "] = {\n"; 2521 2522 OS << " /* Operand List Mask, Mnemonic, Operand Class, Features */\n"; 2523 for (std::vector<OperandMatchEntry>::const_iterator it = 2524 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end(); 2525 it != ie; ++it) { 2526 const OperandMatchEntry &OMI = *it; 2527 const MatchableInfo &II = *OMI.MI; 2528 2529 OS << " { "; 2530 2531 // Write the required features mask. 2532 if (!II.RequiredFeatures.empty()) { 2533 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) { 2534 if (i) OS << "|"; 2535 OS << II.RequiredFeatures[i]->getEnumName(); 2536 } 2537 } else 2538 OS << "0"; 2539 2540 // Store a pascal-style length byte in the mnemonic. 2541 std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str(); 2542 OS << ", " << StringTable.GetOrAddStringOffset(LenMnemonic, false) 2543 << " /* " << II.Mnemonic << " */, "; 2544 2545 OS << OMI.CI->Name; 2546 2547 OS << ", " << OMI.OperandMask; 2548 OS << " /* "; 2549 bool printComma = false; 2550 for (int i = 0, e = 31; i !=e; ++i) 2551 if (OMI.OperandMask & (1 << i)) { 2552 if (printComma) 2553 OS << ", "; 2554 OS << i; 2555 printComma = true; 2556 } 2557 OS << " */"; 2558 2559 OS << " },\n"; 2560 } 2561 OS << "};\n\n"; 2562 2563 // Emit the operand class switch to call the correct custom parser for 2564 // the found operand class. 2565 OS << Target.getName() << ClassName << "::OperandMatchResultTy " 2566 << Target.getName() << ClassName << "::\n" 2567 << "tryCustomParseOperand(OperandVector" 2568 << " &Operands,\n unsigned MCK) {\n\n" 2569 << " switch(MCK) {\n"; 2570 2571 for (const auto &CI : Info.Classes) { 2572 if (CI.ParserMethod.empty()) 2573 continue; 2574 OS << " case " << CI.Name << ":\n" 2575 << " return " << CI.ParserMethod << "(Operands);\n"; 2576 } 2577 2578 OS << " default:\n"; 2579 OS << " return MatchOperand_NoMatch;\n"; 2580 OS << " }\n"; 2581 OS << " return MatchOperand_NoMatch;\n"; 2582 OS << "}\n\n"; 2583 2584 // Emit the static custom operand parser. This code is very similar with 2585 // the other matcher. Also use MatchResultTy here just in case we go for 2586 // a better error handling. 2587 OS << Target.getName() << ClassName << "::OperandMatchResultTy " 2588 << Target.getName() << ClassName << "::\n" 2589 << "MatchOperandParserImpl(OperandVector" 2590 << " &Operands,\n StringRef Mnemonic) {\n"; 2591 2592 // Emit code to get the available features. 2593 OS << " // Get the current feature set.\n"; 2594 OS << " uint64_t AvailableFeatures = getAvailableFeatures();\n\n"; 2595 2596 OS << " // Get the next operand index.\n"; 2597 OS << " unsigned NextOpNum = Operands.size();\n"; 2598 2599 // Emit code to search the table. 2600 OS << " // Search the table.\n"; 2601 OS << " std::pair<const OperandMatchEntry*, const OperandMatchEntry*>"; 2602 OS << " MnemonicRange\n"; 2603 OS << " (OperandMatchTable, OperandMatchTable+"; 2604 OS << Info.OperandMatchInfo.size() << ");\n"; 2605 OS << " if(!Mnemonic.empty())\n"; 2606 OS << " MnemonicRange = std::equal_range(OperandMatchTable,"; 2607 OS << " OperandMatchTable+" 2608 << Info.OperandMatchInfo.size() << ", Mnemonic,\n" 2609 << " LessOpcodeOperand());\n\n"; 2610 2611 OS << " if (MnemonicRange.first == MnemonicRange.second)\n"; 2612 OS << " return MatchOperand_NoMatch;\n\n"; 2613 2614 OS << " for (const OperandMatchEntry *it = MnemonicRange.first,\n" 2615 << " *ie = MnemonicRange.second; it != ie; ++it) {\n"; 2616 2617 OS << " // equal_range guarantees that instruction mnemonic matches.\n"; 2618 OS << " assert(Mnemonic == it->getMnemonic());\n\n"; 2619 2620 // Emit check that the required features are available. 2621 OS << " // check if the available features match\n"; 2622 OS << " if ((AvailableFeatures & it->RequiredFeatures) " 2623 << "!= it->RequiredFeatures) {\n"; 2624 OS << " continue;\n"; 2625 OS << " }\n\n"; 2626 2627 // Emit check to ensure the operand number matches. 2628 OS << " // check if the operand in question has a custom parser.\n"; 2629 OS << " if (!(it->OperandMask & (1 << NextOpNum)))\n"; 2630 OS << " continue;\n\n"; 2631 2632 // Emit call to the custom parser method 2633 OS << " // call custom parse method to handle the operand\n"; 2634 OS << " OperandMatchResultTy Result = "; 2635 OS << "tryCustomParseOperand(Operands, it->Class);\n"; 2636 OS << " if (Result != MatchOperand_NoMatch)\n"; 2637 OS << " return Result;\n"; 2638 OS << " }\n\n"; 2639 2640 OS << " // Okay, we had no match.\n"; 2641 OS << " return MatchOperand_NoMatch;\n"; 2642 OS << "}\n\n"; 2643 } 2644 2645 void AsmMatcherEmitter::run(raw_ostream &OS) { 2646 CodeGenTarget Target(Records); 2647 Record *AsmParser = Target.getAsmParser(); 2648 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName"); 2649 2650 // Compute the information on the instructions to match. 2651 AsmMatcherInfo Info(AsmParser, Target, Records); 2652 Info.buildInfo(); 2653 2654 // Sort the instruction table using the partial order on classes. We use 2655 // stable_sort to ensure that ambiguous instructions are still 2656 // deterministically ordered. 2657 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(), 2658 [](const std::unique_ptr<MatchableInfo> &a, 2659 const std::unique_ptr<MatchableInfo> &b){ 2660 return *a < *b;}); 2661 2662 DEBUG_WITH_TYPE("instruction_info", { 2663 for (const auto &MI : Info.Matchables) 2664 MI->dump(); 2665 }); 2666 2667 // Check for ambiguous matchables. 2668 DEBUG_WITH_TYPE("ambiguous_instrs", { 2669 unsigned NumAmbiguous = 0; 2670 for (auto I = Info.Matchables.begin(), E = Info.Matchables.end(); I != E; 2671 ++I) { 2672 for (auto J = std::next(I); J != E; ++J) { 2673 const MatchableInfo &A = **I; 2674 const MatchableInfo &B = **J; 2675 2676 if (A.couldMatchAmbiguouslyWith(B)) { 2677 errs() << "warning: ambiguous matchables:\n"; 2678 A.dump(); 2679 errs() << "\nis incomparable with:\n"; 2680 B.dump(); 2681 errs() << "\n\n"; 2682 ++NumAmbiguous; 2683 } 2684 } 2685 } 2686 if (NumAmbiguous) 2687 errs() << "warning: " << NumAmbiguous 2688 << " ambiguous matchables!\n"; 2689 }); 2690 2691 // Compute the information on the custom operand parsing. 2692 Info.buildOperandMatchInfo(); 2693 2694 // Write the output. 2695 2696 // Information for the class declaration. 2697 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n"; 2698 OS << "#undef GET_ASSEMBLER_HEADER\n"; 2699 OS << " // This should be included into the middle of the declaration of\n"; 2700 OS << " // your subclasses implementation of MCTargetAsmParser.\n"; 2701 OS << " uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;\n"; 2702 OS << " void convertToMCInst(unsigned Kind, MCInst &Inst, " 2703 << "unsigned Opcode,\n" 2704 << " const OperandVector " 2705 << "&Operands);\n"; 2706 OS << " void convertToMapAndConstraints(unsigned Kind,\n "; 2707 OS << " const OperandVector &Operands) override;\n"; 2708 OS << " bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) override;\n"; 2709 OS << " unsigned MatchInstructionImpl(const OperandVector &Operands,\n" 2710 << " MCInst &Inst,\n" 2711 << " uint64_t &ErrorInfo," 2712 << " bool matchingInlineAsm,\n" 2713 << " unsigned VariantID = 0);\n"; 2714 2715 if (!Info.OperandMatchInfo.empty()) { 2716 OS << "\n enum OperandMatchResultTy {\n"; 2717 OS << " MatchOperand_Success, // operand matched successfully\n"; 2718 OS << " MatchOperand_NoMatch, // operand did not match\n"; 2719 OS << " MatchOperand_ParseFail // operand matched but had errors\n"; 2720 OS << " };\n"; 2721 OS << " OperandMatchResultTy MatchOperandParserImpl(\n"; 2722 OS << " OperandVector &Operands,\n"; 2723 OS << " StringRef Mnemonic);\n"; 2724 2725 OS << " OperandMatchResultTy tryCustomParseOperand(\n"; 2726 OS << " OperandVector &Operands,\n"; 2727 OS << " unsigned MCK);\n\n"; 2728 } 2729 2730 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n"; 2731 2732 // Emit the operand match diagnostic enum names. 2733 OS << "\n#ifdef GET_OPERAND_DIAGNOSTIC_TYPES\n"; 2734 OS << "#undef GET_OPERAND_DIAGNOSTIC_TYPES\n\n"; 2735 emitOperandDiagnosticTypes(Info, OS); 2736 OS << "#endif // GET_OPERAND_DIAGNOSTIC_TYPES\n\n"; 2737 2738 2739 OS << "\n#ifdef GET_REGISTER_MATCHER\n"; 2740 OS << "#undef GET_REGISTER_MATCHER\n\n"; 2741 2742 // Emit the subtarget feature enumeration. 2743 emitSubtargetFeatureFlagEnumeration(Info, OS); 2744 2745 // Emit the function to match a register name to number. 2746 // This should be omitted for Mips target 2747 if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName")) 2748 emitMatchRegisterName(Target, AsmParser, OS); 2749 2750 OS << "#endif // GET_REGISTER_MATCHER\n\n"; 2751 2752 OS << "\n#ifdef GET_SUBTARGET_FEATURE_NAME\n"; 2753 OS << "#undef GET_SUBTARGET_FEATURE_NAME\n\n"; 2754 2755 // Generate the helper function to get the names for subtarget features. 2756 emitGetSubtargetFeatureName(Info, OS); 2757 2758 OS << "#endif // GET_SUBTARGET_FEATURE_NAME\n\n"; 2759 2760 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n"; 2761 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n"; 2762 2763 // Generate the function that remaps for mnemonic aliases. 2764 bool HasMnemonicAliases = emitMnemonicAliases(OS, Info, Target); 2765 2766 // Generate the convertToMCInst function to convert operands into an MCInst. 2767 // Also, generate the convertToMapAndConstraints function for MS-style inline 2768 // assembly. The latter doesn't actually generate a MCInst. 2769 emitConvertFuncs(Target, ClassName, Info.Matchables, OS); 2770 2771 // Emit the enumeration for classes which participate in matching. 2772 emitMatchClassEnumeration(Target, Info.Classes, OS); 2773 2774 // Emit the routine to match token strings to their match class. 2775 emitMatchTokenString(Target, Info.Classes, OS); 2776 2777 // Emit the subclass predicate routine. 2778 emitIsSubclass(Target, Info.Classes, OS); 2779 2780 // Emit the routine to validate an operand against a match class. 2781 emitValidateOperandClass(Info, OS); 2782 2783 // Emit the available features compute function. 2784 emitComputeAvailableFeatures(Info, OS); 2785 2786 2787 StringToOffsetTable StringTable; 2788 2789 size_t MaxNumOperands = 0; 2790 unsigned MaxMnemonicIndex = 0; 2791 bool HasDeprecation = false; 2792 for (const auto &MI : Info.Matchables) { 2793 MaxNumOperands = std::max(MaxNumOperands, MI->AsmOperands.size()); 2794 HasDeprecation |= MI->HasDeprecation; 2795 2796 // Store a pascal-style length byte in the mnemonic. 2797 std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str(); 2798 MaxMnemonicIndex = std::max(MaxMnemonicIndex, 2799 StringTable.GetOrAddStringOffset(LenMnemonic, false)); 2800 } 2801 2802 OS << "static const char *const MnemonicTable =\n"; 2803 StringTable.EmitString(OS); 2804 OS << ";\n\n"; 2805 2806 // Emit the static match table; unused classes get initalized to 0 which is 2807 // guaranteed to be InvalidMatchClass. 2808 // 2809 // FIXME: We can reduce the size of this table very easily. First, we change 2810 // it so that store the kinds in separate bit-fields for each index, which 2811 // only needs to be the max width used for classes at that index (we also need 2812 // to reject based on this during classification). If we then make sure to 2813 // order the match kinds appropriately (putting mnemonics last), then we 2814 // should only end up using a few bits for each class, especially the ones 2815 // following the mnemonic. 2816 OS << "namespace {\n"; 2817 OS << " struct MatchEntry {\n"; 2818 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex) 2819 << " Mnemonic;\n"; 2820 OS << " uint16_t Opcode;\n"; 2821 OS << " " << getMinimalTypeForRange(Info.Matchables.size()) 2822 << " ConvertFn;\n"; 2823 OS << " " << getMinimalRequiredFeaturesType(Info) 2824 << " RequiredFeatures;\n"; 2825 OS << " " << getMinimalTypeForRange( 2826 std::distance(Info.Classes.begin(), Info.Classes.end())) 2827 << " Classes[" << MaxNumOperands << "];\n"; 2828 OS << " StringRef getMnemonic() const {\n"; 2829 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n"; 2830 OS << " MnemonicTable[Mnemonic]);\n"; 2831 OS << " }\n"; 2832 OS << " };\n\n"; 2833 2834 OS << " // Predicate for searching for an opcode.\n"; 2835 OS << " struct LessOpcode {\n"; 2836 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n"; 2837 OS << " return LHS.getMnemonic() < RHS;\n"; 2838 OS << " }\n"; 2839 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n"; 2840 OS << " return LHS < RHS.getMnemonic();\n"; 2841 OS << " }\n"; 2842 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n"; 2843 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n"; 2844 OS << " }\n"; 2845 OS << " };\n"; 2846 2847 OS << "} // end anonymous namespace.\n\n"; 2848 2849 unsigned VariantCount = Target.getAsmParserVariantCount(); 2850 for (unsigned VC = 0; VC != VariantCount; ++VC) { 2851 Record *AsmVariant = Target.getAsmParserVariant(VC); 2852 int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); 2853 2854 OS << "static const MatchEntry MatchTable" << VC << "[] = {\n"; 2855 2856 for (const auto &MI : Info.Matchables) { 2857 if (MI->AsmVariantID != AsmVariantNo) 2858 continue; 2859 2860 // Store a pascal-style length byte in the mnemonic. 2861 std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str(); 2862 OS << " { " << StringTable.GetOrAddStringOffset(LenMnemonic, false) 2863 << " /* " << MI->Mnemonic << " */, " 2864 << Target.getName() << "::" 2865 << MI->getResultInst()->TheDef->getName() << ", " 2866 << MI->ConversionFnKind << ", "; 2867 2868 // Write the required features mask. 2869 if (!MI->RequiredFeatures.empty()) { 2870 for (unsigned i = 0, e = MI->RequiredFeatures.size(); i != e; ++i) { 2871 if (i) OS << "|"; 2872 OS << MI->RequiredFeatures[i]->getEnumName(); 2873 } 2874 } else 2875 OS << "0"; 2876 2877 OS << ", { "; 2878 for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) { 2879 const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i]; 2880 2881 if (i) OS << ", "; 2882 OS << Op.Class->Name; 2883 } 2884 OS << " }, },\n"; 2885 } 2886 2887 OS << "};\n\n"; 2888 } 2889 2890 // A method to determine if a mnemonic is in the list. 2891 OS << "bool " << Target.getName() << ClassName << "::\n" 2892 << "mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) {\n"; 2893 OS << " // Find the appropriate table for this asm variant.\n"; 2894 OS << " const MatchEntry *Start, *End;\n"; 2895 OS << " switch (VariantID) {\n"; 2896 OS << " default: llvm_unreachable(\"invalid variant!\");\n"; 2897 for (unsigned VC = 0; VC != VariantCount; ++VC) { 2898 Record *AsmVariant = Target.getAsmParserVariant(VC); 2899 int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); 2900 OS << " case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC 2901 << "); End = std::end(MatchTable" << VC << "); break;\n"; 2902 } 2903 OS << " }\n"; 2904 OS << " // Search the table.\n"; 2905 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n"; 2906 OS << " std::equal_range(Start, End, Mnemonic, LessOpcode());\n"; 2907 OS << " return MnemonicRange.first != MnemonicRange.second;\n"; 2908 OS << "}\n\n"; 2909 2910 // Finally, build the match function. 2911 OS << "unsigned " << Target.getName() << ClassName << "::\n" 2912 << "MatchInstructionImpl(const OperandVector &Operands,\n"; 2913 OS << " MCInst &Inst, uint64_t &ErrorInfo,\n" 2914 << " bool matchingInlineAsm, unsigned VariantID) {\n"; 2915 2916 OS << " // Eliminate obvious mismatches.\n"; 2917 OS << " if (Operands.size() > " << MaxNumOperands << ") {\n"; 2918 OS << " ErrorInfo = " << MaxNumOperands << ";\n"; 2919 OS << " return Match_InvalidOperand;\n"; 2920 OS << " }\n\n"; 2921 2922 // Emit code to get the available features. 2923 OS << " // Get the current feature set.\n"; 2924 OS << " uint64_t AvailableFeatures = getAvailableFeatures();\n\n"; 2925 2926 OS << " // Get the instruction mnemonic, which is the first token.\n"; 2927 OS << " StringRef Mnemonic;\n"; 2928 OS << " if (Operands[0]->isToken())\n"; 2929 OS << " Mnemonic = ((" << Target.getName() 2930 << "Operand&)*Operands[0]).getToken();\n\n"; 2931 2932 if (HasMnemonicAliases) { 2933 OS << " // Process all MnemonicAliases to remap the mnemonic.\n"; 2934 OS << " applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);\n\n"; 2935 } 2936 2937 // Emit code to compute the class list for this operand vector. 2938 OS << " // Some state to try to produce better error messages.\n"; 2939 OS << " bool HadMatchOtherThanFeatures = false;\n"; 2940 OS << " bool HadMatchOtherThanPredicate = false;\n"; 2941 OS << " unsigned RetCode = Match_InvalidOperand;\n"; 2942 OS << " uint64_t MissingFeatures = ~0ULL;\n"; 2943 OS << " // Set ErrorInfo to the operand that mismatches if it is\n"; 2944 OS << " // wrong for all instances of the instruction.\n"; 2945 OS << " ErrorInfo = ~0ULL;\n"; 2946 2947 // Emit code to search the table. 2948 OS << " // Find the appropriate table for this asm variant.\n"; 2949 OS << " const MatchEntry *Start, *End;\n"; 2950 OS << " switch (VariantID) {\n"; 2951 OS << " default: llvm_unreachable(\"invalid variant!\");\n"; 2952 for (unsigned VC = 0; VC != VariantCount; ++VC) { 2953 Record *AsmVariant = Target.getAsmParserVariant(VC); 2954 int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); 2955 OS << " case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC 2956 << "); End = std::end(MatchTable" << VC << "); break;\n"; 2957 } 2958 OS << " }\n"; 2959 OS << " // Search the table.\n"; 2960 OS << " std::pair<const MatchEntry*, const MatchEntry*>" 2961 "MnemonicRange(Start, End);\n"; 2962 OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n"; 2963 OS << " if (!Mnemonic.empty())\n"; 2964 OS << " MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode());\n\n"; 2965 2966 OS << " // Return a more specific error code if no mnemonics match.\n"; 2967 OS << " if (MnemonicRange.first == MnemonicRange.second)\n"; 2968 OS << " return Match_MnemonicFail;\n\n"; 2969 2970 OS << " for (const MatchEntry *it = MnemonicRange.first, " 2971 << "*ie = MnemonicRange.second;\n"; 2972 OS << " it != ie; ++it) {\n"; 2973 2974 // Emit check that the subclasses match. 2975 OS << " bool OperandsValid = true;\n"; 2976 OS << " for (unsigned i = SIndex; i != " << MaxNumOperands << "; ++i) {\n"; 2977 OS << " auto Formal = static_cast<MatchClassKind>(it->Classes[i]);\n"; 2978 OS << " if (i >= Operands.size()) {\n"; 2979 OS << " OperandsValid = (Formal == " <<"InvalidMatchClass);\n"; 2980 OS << " if (!OperandsValid) ErrorInfo = i;\n"; 2981 OS << " break;\n"; 2982 OS << " }\n"; 2983 OS << " MCParsedAsmOperand &Actual = *Operands[i];\n"; 2984 OS << " unsigned Diag = validateOperandClass(Actual, Formal);\n"; 2985 OS << " if (Diag == Match_Success)\n"; 2986 OS << " continue;\n"; 2987 OS << " // If the generic handler indicates an invalid operand\n"; 2988 OS << " // failure, check for a special case.\n"; 2989 OS << " if (Diag == Match_InvalidOperand) {\n"; 2990 OS << " Diag = validateTargetOperandClass(Actual, Formal);\n"; 2991 OS << " if (Diag == Match_Success)\n"; 2992 OS << " continue;\n"; 2993 OS << " }\n"; 2994 OS << " // If this operand is broken for all of the instances of this\n"; 2995 OS << " // mnemonic, keep track of it so we can report loc info.\n"; 2996 OS << " // If we already had a match that only failed due to a\n"; 2997 OS << " // target predicate, that diagnostic is preferred.\n"; 2998 OS << " if (!HadMatchOtherThanPredicate &&\n"; 2999 OS << " (it == MnemonicRange.first || ErrorInfo <= i)) {\n"; 3000 OS << " ErrorInfo = i;\n"; 3001 OS << " // InvalidOperand is the default. Prefer specificity.\n"; 3002 OS << " if (Diag != Match_InvalidOperand)\n"; 3003 OS << " RetCode = Diag;\n"; 3004 OS << " }\n"; 3005 OS << " // Otherwise, just reject this instance of the mnemonic.\n"; 3006 OS << " OperandsValid = false;\n"; 3007 OS << " break;\n"; 3008 OS << " }\n\n"; 3009 3010 OS << " if (!OperandsValid) continue;\n"; 3011 3012 // Emit check that the required features are available. 3013 OS << " if ((AvailableFeatures & it->RequiredFeatures) " 3014 << "!= it->RequiredFeatures) {\n"; 3015 OS << " HadMatchOtherThanFeatures = true;\n"; 3016 OS << " uint64_t NewMissingFeatures = it->RequiredFeatures & " 3017 "~AvailableFeatures;\n"; 3018 OS << " if (countPopulation(NewMissingFeatures) <=\n" 3019 " countPopulation(MissingFeatures))\n"; 3020 OS << " MissingFeatures = NewMissingFeatures;\n"; 3021 OS << " continue;\n"; 3022 OS << " }\n"; 3023 OS << "\n"; 3024 OS << " Inst.clear();\n\n"; 3025 OS << " if (matchingInlineAsm) {\n"; 3026 OS << " Inst.setOpcode(it->Opcode);\n"; 3027 OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n"; 3028 OS << " return Match_Success;\n"; 3029 OS << " }\n\n"; 3030 OS << " // We have selected a definite instruction, convert the parsed\n" 3031 << " // operands into the appropriate MCInst.\n"; 3032 OS << " convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n"; 3033 OS << "\n"; 3034 3035 // Verify the instruction with the target-specific match predicate function. 3036 OS << " // We have a potential match. Check the target predicate to\n" 3037 << " // handle any context sensitive constraints.\n" 3038 << " unsigned MatchResult;\n" 3039 << " if ((MatchResult = checkTargetMatchPredicate(Inst)) !=" 3040 << " Match_Success) {\n" 3041 << " Inst.clear();\n" 3042 << " RetCode = MatchResult;\n" 3043 << " HadMatchOtherThanPredicate = true;\n" 3044 << " continue;\n" 3045 << " }\n\n"; 3046 3047 // Call the post-processing function, if used. 3048 std::string InsnCleanupFn = 3049 AsmParser->getValueAsString("AsmParserInstCleanup"); 3050 if (!InsnCleanupFn.empty()) 3051 OS << " " << InsnCleanupFn << "(Inst);\n"; 3052 3053 if (HasDeprecation) { 3054 OS << " std::string Info;\n"; 3055 OS << " if (MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, getSTI(), Info)) {\n"; 3056 OS << " SMLoc Loc = ((" << Target.getName() 3057 << "Operand&)*Operands[0]).getStartLoc();\n"; 3058 OS << " getParser().Warning(Loc, Info, None);\n"; 3059 OS << " }\n"; 3060 } 3061 3062 OS << " return Match_Success;\n"; 3063 OS << " }\n\n"; 3064 3065 OS << " // Okay, we had no match. Try to return a useful error code.\n"; 3066 OS << " if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)\n"; 3067 OS << " return RetCode;\n\n"; 3068 OS << " // Missing feature matches return which features were missing\n"; 3069 OS << " ErrorInfo = MissingFeatures;\n"; 3070 OS << " return Match_MissingFeature;\n"; 3071 OS << "}\n\n"; 3072 3073 if (!Info.OperandMatchInfo.empty()) 3074 emitCustomOperandParsing(OS, Target, Info, ClassName, StringTable, 3075 MaxMnemonicIndex); 3076 3077 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n"; 3078 } 3079 3080 namespace llvm { 3081 3082 void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) { 3083 emitSourceFileHeader("Assembly Matcher Source Fragment", OS); 3084 AsmMatcherEmitter(RK).run(OS); 3085 } 3086 3087 } // End llvm namespace 3088