| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mmix/ |
| undef-1.s | 0 ADDU regvar,$8,$9
|
| pr12815-1.s | 16 ADDU $253,$254,8
18 ADDU $0,$0,1
23 ADDU $254,$254,8
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| prefix2.s | 3 :Main ADDU $1,$22,$233
|
| reg3-op.s | 5 4ADDU Y,$32,Z
6 8ADDU $232,$133,Z
7 16ADDU X,Y,$73
15 2ADDU $232,$133,Z0
25 16ADDU X,Y,0
27 ADDU X,$38,0
|
| reg3-op.l | 8 5 0008 2A0C2043 4ADDU Y,\$32,Z
9 6 000c 2CE88543 8ADDU \$232,\$133,Z
10 7 0010 2E170C49 16ADDU X,Y,\$73
18 15 002c 29E885B0 2ADDU \$232,\$133,Z0
28 25 0050 2F170C00 16ADDU X,Y,0
30 27 0058 23172600 ADDU X,\$38,0
|
| list-insns.s | 53 2ADDU $12,$223,$11
54 2ADDU $122,$203,0
55 ADDU $122,$203,255
56 ADDU $12,$223,$11
59 4ADDU $122,$203,205
60 4ADDU $12,$223,$111
63 8ADDU $12,$223,$11
64 8ADDU $122,$203,205
67 16ADDU $2,$223,$11
68 16ADDU $12,$20,20
[all...] |
| list-insns.l | 56 53 00b8 280CDF0B 2ADDU \$12,\$223,\$11
57 54 00bc 297ACB00 2ADDU \$122,\$203,0
58 55 00c0 237ACBFF ADDU \$122,\$203,255
59 56 00c4 220CDF0B ADDU \$12,\$223,\$11
66 59 00d0 2B7ACBCD 4ADDU \$122,\$203,205
67 60 00d4 2A0CDF6F 4ADDU \$12,\$223,\$111
70 63 00e0 2C0CDF0B 8ADDU \$12,\$223,\$11
71 64 00e4 2D7ACBCD 8ADDU \$122,\$203,205
74 67 00f0 2E02DF0B 16ADDU \$2,\$223,\$11
75 68 00f4 2F0C14CD 16ADDU \$12,\$20,20
[all...] |
| comment-1.s | 13 ADDU $15,$16,17 would make; x y z
|
| /external/pcre/dist/sljit/ |
| sljitNativeMIPS_32.c | 79 return push_inst(compiler, ADDU | S(src2) | TA(0) | D(dst), DR(dst));
139 FAIL_IF(push_inst(compiler, ADDU | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
149 return push_inst(compiler, ADDU | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG);
179 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG));
184 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst)));
212 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst)));
217 FAIL_IF(push_inst(compiler, ADDU | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst)));
|
| sljitNativeMIPS_64.c | 170 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(dst), DR(dst));
231 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
241 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG);
271 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG));
276 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst)));
304 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst)));
309 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst)));
|
| sljitNativeMIPS_common.c | 101 #define ADDU (HI(0) | LO(33))
187 #define ADDU_W ADDU
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 444 mMips->ADDU(Rd, Rn, src);
619 mMips->ADDU(Rd, R_at, Rn);
796 mMips->ADDU(R_at, Rn, amode.reg);
824 mMips->ADDU(R_at, Rn, amode.reg);
861 mMips->ADDU(R_at, Rn, amode.reg);
889 mMips->ADDU(R_at, Rn, amode.reg);
914 mMips->ADDU(R_at, Rn, amode.reg);
956 mMips->ADDU(R_at, Rn, amode.reg);
[all...] |
| MIPS64Assembler.cpp | 427 mMips->ADDU(Rd, Rn, src);
611 mMips->ADDU(Rd, R_at, Rn);
[all...] |
| MIPSAssembler.h | 273 void ADDU(int Rd, int Rs, int Rt);
|
| /external/valgrind/none/tests/mips64/ |
| arithmetic_instruction.c | 6 ADD=0, ADDI, ADDIU, ADDU,
55 case ADDU:
59 TEST1("addu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1],
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 432 unsigned ADDu = ABI.GetPtrAdduOp();
442 BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill);
688 unsigned ADDU = ABI.GetPtrAdduOp();
696 // addu $ra, $v0, $zero
697 // addu $sp, $sp, $v1
701 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9)
704 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA)
707 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg);
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| m88k.h | 253 #define ADDU 1
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| m88k-dis.c | 113 {0xf4006000,"addu ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} },
114 {0xf4006200,"addu.ci ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} },
115 {0xf4006100,"addu.co ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} },
116 {0xf4006300,"addu.cio ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {1,1,PINT,ADDU, 0,1,1,1,0,0,0,0,0,0,0,0} },
136 {0x60000000,"addu ",{21,5,REG} ,{16,5,REG} ,{0,16,HEX}, {1,1,PINT,ADDU, i16bit,1,0,1,0,0,0,0,0,0,0,0} }
[all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 438 ADDU = ((4U << 3) + 1),
934 FunctionFieldToBitNumber(ADD) | FunctionFieldToBitNumber(ADDU) |
[all...] |
| assembler-mips.cc | 1585 void Assembler::addu(Register rd, Register rs, Register rt) { function in class:v8::Assembler
[all...] |
| simulator-mips.cc | [all...] |
| /external/v8/src/mips64/ |
| constants-mips64.h | 431 ADDU = ((4U << 3) + 1),
978 FunctionFieldToBitNumber(ADDU) | FunctionFieldToBitNumber(DADDU) |
[all...] |
| assembler-mips64.cc | 1583 void Assembler::addu(Register rd, Register rs, Register rt) { function in class:v8::internal::Assembler
[all...] |
| simulator-mips64.cc | [all...] |
| /external/valgrind/none/tests/mips32/ |
| mips32_dspr2.stdout.exp | 202 -------- ADDU.PH --------
203 addu.ph $t0, $t1, $t2 :: rs 0x00000000 rt 0x00000000 out 0x00000000 DSPCtrl 0x00000000
204 addu.ph $t2, $t3, $t4 :: rs 0x00045fb2 rt 0x00000286 out 0x00046238 DSPCtrl 0x00000000
205 addu.ph $t4, $t1, $t5 :: rs 0x00002435 rt 0xffff3421 out 0xffff5856 DSPCtrl 0x00000000
206 addu.ph $t6, $t7, $t3 :: rs 0x07654cb8 rt 0x734680bc out 0x7aabcd74 DSPCtrl 0x00000000
207 addu.ph $t5, $t3, $t2 :: rs 0xf973437b rt 0x80000000 out 0x7973437b DSPCtrl 0x00100000
208 addu.ph $t2, $t4, $t8 :: rs 0x00010001 rt 0xffffffff out 0x00000000 DSPCtrl 0x00100000
209 addu.ph $t0, $t8, $t0 :: rs 0x7fff7fff rt 0x7fff7fff out 0xfffefffe DSPCtrl 0x00000000
210 addu.ph $t4, $t6, $t1 :: rs 0x0000c420 rt 0x00000555 out 0x0000c975 DSPCtrl 0x00000000
211 addu.ph $t2, $t3, $t4 :: rs 0x00000004 rt 0x40000000 out 0x40000004 DSPCtrl 0x0000000
[all...] |
