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Searched
refs:GPR64RegClass
(Results
1 - 18
of
18
) sorted by null
/external/llvm/lib/Target/Mips/
MipsOptionRecord.h
47
GPR64RegClass
= &(TRI->getRegClass(Mips::GPR64RegClassID));
65
const MCRegisterClass *
GPR64RegClass
;
MipsMachineFunction.cpp
49
? &Mips::
GPR64RegClass
70
? &Mips::
GPR64RegClass
MipsSERegisterInfo.cpp
63
return &Mips::
GPR64RegClass
;
183
ABI.ArePtrs64bit() ? &Mips::
GPR64RegClass
: &Mips::GPR32RegClass;
MipsSubtarget.cpp
135
&Mips::
GPR64RegClass
: &Mips::GPR32RegClass);
MipsSEInstrInfo.cpp
142
else if (Mips::
GPR64RegClass
.contains(DestReg)) { // Copy to CPU64 Reg.
143
if (Mips::
GPR64RegClass
.contains(SrcReg))
152
else if (Mips::
GPR64RegClass
.contains(SrcReg)) { // Copy from CPU64 Reg.
191
else if (Mips::
GPR64RegClass
.hasSubClassEq(RC))
264
else if (Mips::
GPR64RegClass
.hasSubClassEq(RC))
459
&Mips::
GPR64RegClass
: &Mips::GPR32RegClass;
MipsRegisterInfo.cpp
55
return ABI.ArePtrs64bit() ? &Mips::
GPR64RegClass
: &Mips::GPR32RegClass;
MipsSEFrameLowering.cpp
398
&Mips::
GPR64RegClass
: &Mips::GPR32RegClass;
698
ABI.ArePtrs64bit() ? &Mips::
GPR64RegClass
: &Mips::GPR32RegClass;
[
all
...]
MipsSEISelDAGToDAG.cpp
143
RC = (ABI.IsN64()) ? &Mips::
GPR64RegClass
: &Mips::GPR32RegClass;
[
all
...]
MipsISelLowering.cpp
[
all
...]
MipsSEISelLowering.cpp
45
addRegisterClass(MVT::i64, &Mips::
GPR64RegClass
);
[
all
...]
/external/llvm/lib/Target/Mips/MCTargetDesc/
MipsOptionRecord.cpp
80
GPR64RegClass
->contains(CurrentSubReg))
/external/llvm/lib/Target/AArch64/
AArch64RegisterInfo.cpp
161
return &AArch64::
GPR64RegClass
;
167
return &AArch64::
GPR64RegClass
; // Only MSR & MRS copy NZCV.
394
MF.getRegInfo().createVirtualRegister(&AArch64::
GPR64RegClass
);
AArch64CleanupLocalDynamicTLSPass.cpp
117
*TLSBaseAddrReg = RegInfo.createVirtualRegister(&AArch64::
GPR64RegClass
);
AArch64FrameLowering.cpp
760
if (AArch64::
GPR64RegClass
.contains(Reg1)) {
761
assert(AArch64::
GPR64RegClass
.contains(Reg2) &&
[
all
...]
AArch64FastISel.cpp
344
const TargetRegisterClass *RC = (VT == MVT::i64) ? &AArch64::
GPR64RegClass
378
&AArch64::
GPR64RegClass
: &AArch64::GPR32RegClass;
436
ResultReg = createResultReg(&AArch64::
GPR64RegClass
);
[
all
...]
AArch64AdvSIMDScalarPass.cpp
117
return MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::
GPR64RegClass
);
118
return AArch64::
GPR64RegClass
.contains(Reg);
AArch64InstrInfo.cpp
488
if (MRI.constrainRegClass(DstReg, &AArch64::
GPR64RegClass
)) {
489
RC = &AArch64::
GPR64RegClass
;
[
all
...]
AArch64ISelLowering.cpp
[
all
...]
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