/external/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 82 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register 85 /// IsDef - True if this is a def, false if this is a use of the register. 87 bool IsDef : 1; 279 return !IsDef; 282 bool isDef() const { 284 return IsDef; 376 assert(isReg() && !IsDef && "Wrong MachineOperand accessor"); 382 assert(isReg() && IsDef && "Wrong MachineOperand accessor"); 397 assert(isReg() && IsDef && "Wrong MachineOperand accessor"); 402 assert(isReg() && !IsDef && "Wrong MachineOperand accessor") [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelDAGToDAG.h | 30 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
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MipsDelaySlotFiller.cpp | 90 bool IsDef) const; 280 if (!MO.isReg() || !MO.isDef() || !(R = MO.getReg())) 370 HasHazard |= checkRegDefsUses(NewDefs, NewUses, MO.getReg(), MO.isDef()); 380 unsigned Reg, bool IsDef) const { 381 if (IsDef) {
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MipsSEISelDAGToDAG.cpp | 46 void MipsSEDAGToDAGISel::addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, 50 unsigned Flag = IsDef ? RegState::ImplicitDefine : RegState::Implicit; [all...] |
/external/llvm/lib/CodeGen/ |
LiveInterval.cpp | 903 bool IsDef = false; 923 IsDef |= I->valno->def == I->start; 928 IsDef = I->valno->def == I->start; 947 if (ConstructingSegment && IsDef) { 958 if (IsDef) { [all...] |
MIRPrinter.cpp | 121 unsigned I, bool ShouldPrintRegisterTies, bool IsDef = false); 516 if (!Operand.isReg() || Operand.isDef()) 538 for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() && 543 print(MI.getOperand(I), TRI, I, ShouldPrintRegisterTies, /*IsDef=*/true); 730 unsigned I, bool ShouldPrintRegisterTies, bool IsDef) { 735 OS << (Op.isDef() ? "implicit-def " : "implicit "); 736 else if (!IsDef && Op.isDef()) 755 if (ShouldPrintRegisterTies && Op.isTied() && !Op.isDef())
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MachineInstr.cpp | 101 if (IsDef == Val) 109 IsDef = Val; 113 IsDef = Val; 176 void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, 194 IsDef = isDef; 224 return getReg() == Other.getReg() && isDef() == Other.isDef() && 267 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef()); 318 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() | [all...] |
BranchFolding.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonExpandCondsets.cpp | 279 bool IsDef = !Op.isUndef(); 280 if (Op.isImplicit() && IsDef != SetDef) 309 if (!Op.isReg() || !Op.isDef() || Op.getReg() != Reg) 337 if (!Op.isReg() || !Op.isDef() || Op.getReg() != Reg) 437 if (Op.isReg() && Op.isDef()) 553 if (!Op.isReg() || !Op.isDef()) 720 assert(MD.isDef()); 758 if (!Op.isReg() || !Op.isDef()) 795 if (!Op.isReg() || !Op.isDef()) 842 if (Op.isDef() && isRefInMap(RR, Uses, Exec_Then) [all...] |
HexagonFrameLowering.cpp | 819 unsigned MaxReg, bool IsDef) { 822 MachineOperand ImpUse = MachineOperand::CreateReg(R, IsDef, true); [all...] |
/external/llvm/lib/CodeGen/MIRParser/ |
MIParser.cpp | 123 Optional<unsigned> &TiedDefIdx, bool IsDef = false); 575 if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true)) 719 return MO.isDef() ? "implicit-def" : "implicit"; 894 if (!DefOperand.isReg() || !DefOperand.isDef()) 918 bool IsDef) { 920 unsigned Flags = IsDef ? RegState::Define : 0; [all...] |
/external/llvm/lib/Target/X86/ |
X86FrameLowering.cpp | 176 if (!MO.isReg() || MO.isDef()) 225 if (!MO.isDef()) [all...] |
/external/clang/tools/libclang/ |
CIndex.cpp | [all...] |