| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.h | 57 SDNode *Select(SDNode *N) override;
58 SDNode *SelectIntrinsicNoChain(SDNode *N);
59 SDNode *SelectIntrinsicChain(SDNode *N);
60 SDNode *SelectTexSurfHandle(SDNode *N);
61 SDNode *SelectLoad(SDNode *N)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 94 bool IgnoreNodeResults(SDNode *N) const {
138 SmallVector<SDNode*, 128> Worklist;
153 void NoteDeletion(SDNode *Old, SDNode *New) {
163 SDNode *AnalyzeNewNode(SDNode *N);
165 void ExpungeNode(SDNode *N);
173 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
174 bool CustomWidenLowerNode(SDNode *N, EVT VT);
179 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo)
[all...] |
| InstrEmitter.h | 41 void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
48 unsigned getDstOfOnlyCopyToRegUse(SDNode *Node,
51 void CreateVirtualRegisters(SDNode *Node,
91 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
98 void EmitCopyToRegClassNode(SDNode *Node,
103 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
109 static unsigned CountResults(SDNode *Node);
118 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
137 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
139 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned
[all...] |
| SelectionDAGPrinter.cpp | 44 return ((const SDNode *) Node)->getNumValues();
48 return ((const SDNode *) Node)->getValueType(i).getEVTString();
53 return itostr(I - SDNodeIterator::begin((const SDNode *) Node));
69 SDNode *TargetNode = *I;
83 static std::string getNodeIdentifierLabel(const SDNode *Node,
110 static std::string getSimpleNodeLabel(const SDNode *Node,
119 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph);
120 static std::string getNodeAttributes(const SDNode *N,
144 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
184 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs)
[all...] |
| ScheduleDAGSDNodes.h | 1 //===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===//
11 // scheduling for an SDNode-based dependency graph.
22 /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
32 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
55 static bool isPassiveNode(SDNode *Node) {
76 SUnit *newSUnit(SDNode *N);
97 virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
130 const SDNode *Node;
144 const SDNode *GetNode() const
[all...] |
| ScheduleDAGSDNodes.cpp | 68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) {
110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
140 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs,
163 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) {
164 SDNode *GlueDestNode = Glue.getNode();
188 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) {
202 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) {
203 SDNode *Chain = nullptr;
212 SmallPtrSet<SDNode*, 16> Visited
[all...] |
| SDNodeDbgValue.h | 24 class SDNode;
33 SDNODE = 0, // value is the result of an expression
40 SDNode *Node; // valid for expressions
57 SDDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool indir,
60 kind = SDNODE;
90 // Returns the SDNode* for a register ref
91 SDNode *getSDNode() const { assert (kind==SDNODE); return u.s.Node; }
94 unsigned getResNo() const { assert (kind==SDNODE); return u.s.ResNo; }
116 // property. A SDDbgValue is invalid if the SDNode that produces the value i
[all...] |
| LegalizeFloatTypes.cpp | 49 bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
126 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
132 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
138 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
147 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
157 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
164 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
179 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
192 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
205 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N)
[all...] |
| ScheduleDAGFast.cpp | 217 SDNode *N = SU->getNode();
237 SmallVector<SDNode*, 2> NewNodes;
245 SDNode *LoadNode = NewNodes[0];
391 SUnit *CopyFromSU = newSUnit(static_cast<SDNode *>(nullptr));
395 SUnit *CopyToSU = newSUnit(static_cast<SDNode *>(nullptr));
433 static MVT getPhysicalRegisterVT(SDNode *N, unsigned Reg,
490 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) {
661 std::vector<SDNode*> Sequence;
662 DenseMap<SDNode*, SDNode*> GluedMap; // Cache glue to its use
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.h | 26 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc DL,
33 void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg);
35 bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
38 std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
|
| MipsISelDAGToDAG.h | 45 SDNode *getGlobalBaseReg();
83 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
87 virtual bool selectVSplat(SDNode *N, APInt &Imm,
117 SDNode *Select(SDNode *N) override;
119 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0;
122 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
|
| MipsSEISelDAGToDAG.h | 37 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl,
40 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
41 SDLoc DL, SDNode *Node) const;
81 bool selectVSplat(SDNode *N, APInt &Imm,
114 std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
|
| Mips16ISelDAGToDAG.cpp | 46 std::pair<SDNode*, SDNode*>
47 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, SDLoc DL, EVT Ty,
49 SDNode *Lo = nullptr, *Hi = nullptr;
50 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
127 void Mips16DAGToDAGISel::getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg) {
164 SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset,
245 std::pair<bool, SDNode*> Mips16DAGToDAGISel::selectNode(SDNode *Node) {
284 SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops)
[all...] |
| MipsISelDAGToDAG.cpp | 60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
111 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
117 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
185 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
199 std::pair<bool, SDNode*> Ret = selectNode(Node);
223 SDNode *ResNode = SelectCode(Node);
|
| MipsCCState.h | 18 class SDNode;
27 getSpecialCallingConvForCallee(const SDNode *Callee,
45 const SDNode *CallNode);
76 const SDNode *CallNode) {
|
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGISel.h | 80 virtual SDNode *Select(SDNode *N) = 0;
95 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
101 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
195 void ReplaceUses(SDNode *F, SDNode *T) {
225 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const {
229 virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N
[all...] |
| SelectionDAGNodes.h | 10 // This file declares the SDNode class and derived classes, which are used to
46 class SDNode;
54 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr,
71 bool isBuildVectorAllOnes(const SDNode *N);
75 bool isBuildVectorAllZeros(const SDNode *N);
79 bool isBuildVectorOfConstantSDNodes(const SDNode *N);
83 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N);
87 bool allOperandsUndef(const SDNode *N);
104 SDNode *Node; // The node defining the value we are using.
108 SDValue(SDNode *node, unsigned resno)
[all...] |
| SelectionDAG.h | 11 // SDNode class and subclasses.
83 template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> {
85 mutable ilist_half_node<SDNode> Sentinel;
87 SDNode *createSentinel() const {
88 return static_cast<SDNode*>(&Sentinel);
90 static void destroySentinel(SDNode *) {}
92 SDNode *provideInitialHead() const { return createSentinel(); }
93 SDNode *ensureHead(SDNode*) const { return createSentinel();
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelDAGToDAG.cpp | 57 SDNode *Select(SDNode *Node) override;
70 SDNode *WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
84 SDNode *ResNode = nullptr;
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 114 SDNode *Select(SDNode *N) override;
115 SDNode *SelectIndexedLoad(SDNode *Op);
116 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
327 SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDNode *N) {
351 SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.h | 50 SDValue performUCharToFloatCombine(SDNode *N,
52 SDValue performSHLPtrCombine(SDNode *N,
55 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
56 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
57 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const;
59 SDValue performMin3Max3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
60 SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
83 bool isMemOpUniform(const SDNode *N) const;
106 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
107 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 75 SDNode *Select(SDNode *N) override;
87 SDNode *SelectFrameIndex(SDNode *N);
93 SDNode *SelectLoad(SDNode *N);
94 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl);
95 SDNode *SelectIndexedLoad(LoadSDNode *LD, SDLoc dl);
96 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode,
98 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 45 SDNode *Select(SDNode *N) override;
46 SDNode *SelectBRIND(SDNode *N);
54 inline bool immMskBitp(SDNode *inN) const {
133 SDNode *XCoreDAGToDAGISel::Select(SDNode *N) {
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
198 if (SDNode *ResNode = SelectBRIND(N))
232 SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N)
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelDAGToDAG.cpp | 49 SDNode *Select(SDNode *N) override;
118 SDNode *BPFDAGToDAGISel::Select(SDNode *Node) {
166 SDNode *ResNode = SelectCode(Node);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 45 SDNode *Select(SDNode *N) override;
65 SDNode* getGlobalBaseReg();
66 SDNode *SelectInlineAsm(SDNode *N);
70 SDNode* SparcDAGToDAGISel::getGlobalBaseReg() {
158 SDNode *SparcDAGToDAGISel::SelectInlineAsm(SDNode *N){
240 SDNode *GU = N->getGluedUser();
321 SDNode *SparcDAGToDAGISel::Select(SDNode *N)
[all...] |
