/external/llvm/lib/Transforms/Scalar/ |
Sink.cpp | 59 bool SinkInstruction(Instruction *I, SmallPtrSetImpl<Instruction*> &Stores); 135 SmallPtrSet<Instruction *, 8> Stores; 148 if (SinkInstruction(Inst, Stores)) 158 SmallPtrSetImpl<Instruction *> &Stores) { 161 Stores.insert(Inst); 167 for (Instruction *S : Stores) 208 // We cannot sink a load across a critical edge - there may be stores in 233 SmallPtrSetImpl<Instruction *> &Stores) { 242 if (!isSafeToMove(Inst, AA, Stores))
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Scalarizer.cpp | 154 // This is disabled by default because having separate loads and stores 632 ValueVector Stores; 633 Stores.resize(NumElems); 636 Stores[I] = Builder.CreateAlignedStore(Val[I], Ptr[I], Align); 638 transferMetadata(&SI, Stores);
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SROA.cpp | 130 /// stores both the begin and end offsets of this use, a pointer to the use 735 // We allow splitting of non-volatile loads and stores where the type is an 782 "All simple FCA stores should have been pre-split"); [all...] |
/external/llvm/lib/Analysis/ |
AliasAnalysisEvaluator.cpp | 150 SetVector<Value *> Stores; 162 Stores.insert(&*I); 227 for (SetVector<Value *>::iterator I2 = Stores.begin(), E2 = Stores.end(); 256 for (SetVector<Value *>::iterator I1 = Stores.begin(), E = Stores.end(); 258 for (SetVector<Value *>::iterator I2 = Stores.begin(); I2 != I1; ++I2) {
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LoopAccessAnalysis.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonStoreWidening.cpp | 9 // Replace sequences of "narrow" stores to adjacent memory locations with 10 // a fewer "wide" stores that have the same effect. 18 // The purpose of this pass is to reduce the number of outstanding stores, 19 // or as one could say, "reduce store queue pressure". Also, wide stores 20 // mean fewer stores, and since there are only two memory instructions allowed 24 #define DEBUG_TYPE "hexagon-widen-stores" 86 bool instrAliased(InstrGroup &Stores, const MachineMemOperand &MMO); 87 bool instrAliased(InstrGroup &Stores, const MachineInstr *MI); 141 INITIALIZE_PASS_BEGIN(HexagonStoreWidening, "hexagon-widen-stores", 144 INITIALIZE_PASS_END(HexagonStoreWidening, "hexagon-widen-stores", [all...] |
/external/skia/tools/lua/ |
bbh_filter.lua | 32 output = {} -- Stores {fileName, {verb, count}} tables.
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/external/llvm/lib/Transforms/IPO/ |
ArgumentPromotion.cpp | 177 // Track all of the stores. 178 SmallVector<StoreInst *, 16> Stores; 191 Stores.push_back(Store); 198 for (StoreInst *Store : Stores) [all...] |
GlobalOpt.cpp | 110 /// we might not really want to eliminate the stores to it. 310 // Pointer cast, delete any stores and memsets to the global. 373 // Stores *to* the pointer are ok. 670 // Ignore stores to the global. 768 // Ignore the store that stores "LV" to the global. 780 "Only expect load and stores!"); 789 // If we nuked all of the loads, then none of the stores are needed either, [all...] |
/external/clang/lib/CodeGen/ |
CGExprCXX.cpp | 364 SmallVector<std::pair<CharUnits, CharUnits>, 1> Stores; 365 Stores.emplace_back(CharUnits::Zero(), NVSize); 372 std::pair<CharUnits, CharUnits> LastStore = Stores.pop_back_val(); 380 Stores.emplace_back(SplitBeforeOffset, SplitBeforeSize); 386 Stores.emplace_back(SplitAfterOffset, SplitAfterSize); 409 for (std::pair<CharUnits, CharUnits> Store : Stores) { 423 for (std::pair<CharUnits, CharUnits> Store : Stores) { [all...] |
/external/llvm/lib/Transforms/Vectorize/ |
SLPVectorizer.cpp | 10 // stores that can be put together into vector-stores. Next, it attempts to [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 676 SmallVector<SDValue, 8> Stores; 691 Stores.push_back(Store); 693 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores); [all...] |
LegalizeDAG.cpp | 312 /// Expands an unaligned store to 2 half-size stores. 317 "unaligned indexed stores not implemented!"); 332 // FIXME: Does not handle truncating floating point stores! 340 // to the final destination using (unaligned) integer loads and stores. 359 SmallVector<SDValue, 8> Stores; 369 Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, Ptr, 391 Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, Ptr, 398 // The order of the stores doesn't matter - say it with a TokenFactor. 399 SDValue Result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores); 469 // loads and stores, then do a (aligned) load from the stack slot [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
sp-pc-validations-bad.s | 163 @ Stores, ARM ================================================================
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sp-pc-validations-bad-t.s | 229 @ Stores ==============================================================
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/external/libvpx/libvpx/tools/ |
cpplint.py | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
R600ISelLowering.cpp | 126 // Legalize loads and stores to the private address space. [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 251 // PowerPC turns FP_TO_SINT into FCTIWZ and some load/stores. [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/tools/ |
cpplint.py | [all...] |
/external/cblas/testing/ |
c_cblat2.f | [all...] |
c_cblat3.f | [all...] |
c_dblat2.f | [all...] |
c_dblat3.f | [all...] |
c_sblat2.f | [all...] |
c_sblat3.f | [all...] |