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Searched
refs:getRegClassFor
(Results
1 - 23
of
23
) sorted by null
/external/llvm/lib/CodeGen/SelectionDAG/
ResourcePriorityQueue.cpp
98
&& (TLI->
getRegClassFor
(VT)->getID() == RCId)) {
136
&& (TLI->
getRegClassFor
(VT)->getID() == RCId)) {
336
&& TLI->
getRegClassFor
(VT)
337
&& TLI->
getRegClassFor
(VT)->getID() == RCId)
347
if (TLI->isTypeLegal(VT) && TLI->
getRegClassFor
(VT)
348
&& TLI->
getRegClassFor
(VT)->getID() == RCId)
489
const TargetRegisterClass *RC = TLI->
getRegClassFor
(VT);
500
const TargetRegisterClass *RC = TLI->
getRegClassFor
(VT);
InstrEmitter.cpp
108
UseRC = TLI->
getRegClassFor
(VT);
166
DstRC = TLI->
getRegClassFor
(VT);
228
TLI->
getRegClassFor
(Node->getSimpleValueType(i));
293
TLI->
getRegClassFor
(Op.getSimpleValueType());
458
RC = TRI->getSubClassWithSubReg(TLI->
getRegClassFor
(VT), SubIdx);
493
TLI->
getRegClassFor
(Node->getSimpleValueType(0));
548
const TargetRegisterClass *SRC = TLI->
getRegClassFor
(Node->getSimpleValueType(0));
[
all
...]
FastISel.cpp
255
Reg = createResultReg(TLI.
getRegClassFor
(VT));
756
CLI.ResultReg = createResultReg(TLI.
getRegClassFor
(MVT::i64));
[
all
...]
FunctionLoweringInfo.cpp
348
MF->getSubtarget().getTargetLowering()->
getRegClassFor
(VT));
SelectionDAGBuilder.cpp
[
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...]
SelectionDAGISel.cpp
[
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...]
DAGCombiner.cpp
[
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...]
/external/llvm/lib/Target/ARM/
ARMFastISel.cpp
446
unsigned MoveReg = createResultReg(TLI.
getRegClassFor
(VT));
456
unsigned MoveReg = createResultReg(TLI.
getRegClassFor
(VT));
482
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
498
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
563
ResultReg = createResultReg(TLI.
getRegClassFor
(VT));
653
unsigned NewDestReg = createResultReg(TLI.
getRegClassFor
(VT));
667
unsigned NewDestReg = createResultReg(TLI.
getRegClassFor
(VT));
718
const TargetRegisterClass* RC = TLI.
getRegClassFor
(VT);
[
all
...]
ARMISelLowering.h
381
///
getRegClassFor
- Return the register class that should be used for the
383
const TargetRegisterClass *
getRegClassFor
(MVT VT) const override;
ARMISelLowering.cpp
[
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...]
/external/llvm/lib/CodeGen/
CallingConvLower.cpp
244
const TargetRegisterClass *RC = TL->
getRegClassFor
(RegVT);
MachineScheduler.cpp
[
all
...]
/external/llvm/lib/Target/X86/
X86FastISel.cpp
[
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...]
X86ISelLowering.cpp
[
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...]
/external/llvm/lib/Target/Mips/
MipsISelLowering.cpp
[
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...]
MipsSEISelDAGToDAG.cpp
936
const TargetRegisterClass *RC = TLI->
getRegClassFor
(ResVecTySimple);
[
all
...]
MipsFastISel.cpp
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp
371
return fastEmitInst_i(Opc, TLI.
getRegClassFor
(VT), Imm);
384
unsigned ResultReg = createResultReg(TLI.
getRegClassFor
(VT));
404
unsigned ResultReg = createResultReg(TLI.
getRegClassFor
(VT));
492
return fastEmitInst_r(Opc, TLI.
getRegClassFor
(VT), ZReg, /*IsKill=*/true);
[
all
...]
/external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp
[
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...]
PPCISelLowering.cpp
[
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...]
/external/llvm/include/llvm/Target/
TargetLowering.h
380
virtual const TargetRegisterClass *
getRegClassFor
(MVT VT) const {
[
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...]
/external/llvm/lib/Target/Sparc/
SparcISelLowering.cpp
619
getRegClassFor
(VA.getLocVT()));
[
all
...]
/external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp
[
all
...]
Completed in 467 milliseconds