/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAsmBackendELF.h | 19 bool IsLittle) 20 : ARMAsmBackend(T, TT, IsLittle), OSABI(OSABI) {} 23 return createARMELFObjectWriter(OS, OSABI, isLittle());
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ARMAsmBackend.h | 26 ARMAsmBackend(const Target &T, const Triple &TT, bool IsLittle) 29 IsLittleEndian(IsLittle) {} 75 bool isLittle() const { return IsLittleEndian; }
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ARMAsmBackend.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsTargetMachine.h | 30 bool isLittle; 44 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); 67 bool isLittleEndian() const { return isLittle; }
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MipsTargetMachine.cpp | 49 bool isLittle) { 54 if (isLittle) 89 CodeGenOpt::Level OL, bool isLittle) 90 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, 92 isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()), 94 Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this), 96 isLittle, *this), 98 isLittle, *this) { 159 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, [all...] |
MipsSubtarget.h | 54 // IsLittle - The target is Little Endian 55 bool IsLittle; 218 bool isLittle() const { return IsLittle; }
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MipsSEFrameLowering.cpp | 302 if (!Subtarget.isLittle()) 350 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N)); 445 if (!STI.isLittle()) 461 if (!STI.isLittle()) [all...] |
MipsISelLowering.cpp | [all...] |
MipsAsmPrinter.cpp | 504 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; 507 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1; [all...] |
MipsSEISelDAGToDAG.cpp | 496 MinSizeInBits, !Subtarget->isLittle())) 897 !Subtarget->isLittle())) [all...] |
MipsISelLowering.h | 472 const ISD::ArgFlagsTy &Flags, bool isLittle,
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MipsSEISelLowering.cpp | 682 bool IsLittleEndian = !Subtarget.isLittle(); 863 EltSize, !Subtarget.isLittle()) || [all...] |
MipsFastISel.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMTargetMachine.h | 36 bool isLittle; 43 CodeGenOpt::Level OL, bool isLittle); 48 bool isLittleEndian() const { return isLittle; } 68 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); 103 bool isLittle);
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ARMTargetMachine.cpp | 123 bool isLittle) { 127 if (isLittle) 180 CodeGenOpt::Level OL, bool isLittle) 181 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, 185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) { 235 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle); 252 CodeGenOpt::Level OL, bool isLittle) 253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { [all...] |
ARMSubtarget.h | 240 /// IsLittle - The target is Little Endian 241 bool IsLittle; 262 const ARMBaseTargetMachine &TM, bool IsLittle); 454 bool isLittle() const { return IsLittle; }
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ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64TargetMachine.h | 49 bool isLittle;
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AArch64TargetMachine.cpp | 134 isLittle(LittleEndian) { 159 isLittle);
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
PPCAsmBackend.cpp | 79 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), 80 IsLittleEndian(isLittle) {}
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/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 551 bool isLittle() const { return IsLittleEndian; } [all...] |