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Searched
refs:isPredicated
(Results
1 - 25
of
37
) sorted by null
1
2
/external/mesa3d/src/gallium/drivers/radeon/
R600InstrInfo.cpp
207
if(!
isPredicated
(LastInst)) {
231
isPredicated
(SecondLastInst) &&
233
!
isPredicated
(LastInst)) {
314
if (
isPredicated
(I)) {
332
if (
isPredicated
(I)) {
343
R600InstrInfo::
isPredicated
(const MachineInstr *MI) const
R600InstrInfo.h
75
bool
isPredicated
(const MachineInstr *MI) const;
AMDGPUInstrInfo.cpp
209
bool AMDGPUInstrInfo::
isPredicated
(const MachineInstr *MI) const {
AMDGPUInstrInfo.h
116
bool
isPredicated
(const MachineInstr *MI) const;
/external/llvm/lib/Target/Hexagon/
HexagonVLIWPacketizer.cpp
441
if (!HII->
isPredicated
(MI))
573
if (HII->
isPredicated
(PacketMI)) {
574
if (!HII->
isPredicated
(MI))
796
if (!HII->
isPredicated
(I))
824
assert(QII->
isPredicated
(MI) && "Must be predicated instruction");
[
all
...]
HexagonInstrInfo.h
186
bool
isPredicated
(const MachineInstr *MI) const override;
308
bool
isPredicated
(unsigned Opcode) const;
HexagonExpandCondsets.cpp
424
bool Predicated = HII->
isPredicated
(MI);
751
if (HII->
isPredicated
(MI) || !HII->isPredicable(MI))
787
if (PredValid && HII->
isPredicated
(MI)) {
[
all
...]
HexagonPeephole.cpp
246
if (QII->
isPredicated
(MI)) {
HexagonInstrInfo.cpp
503
if (Term != MBB.end() &&
isPredicated
(Term) &&
[
all
...]
HexagonNewValueJump.cpp
119
if (QII->
isPredicated
(II))
/external/llvm/lib/Target/AMDGPU/
AMDGPUInstrInfo.h
125
bool
isPredicated
(const MachineInstr *MI) const override;
R600InstrInfo.h
171
bool
isPredicated
(const MachineInstr *MI) const override;
AMDGPUInstrInfo.cpp
228
bool AMDGPUInstrInfo::
isPredicated
(const MachineInstr *MI) const {
R600Packetizer.cpp
88
if (TII->
isPredicated
(&*BI))
/external/llvm/lib/CodeGen/
CriticalAntiDepBreaker.cpp
168
TII->
isPredicated
(MI);
244
if (!TII->
isPredicated
(MI)) {
588
if (MI->isCall() || MI->hasExtraDefRegAllocReq() || TII->
isPredicated
(MI))
TargetSchedule.cpp
285
if (!DepMI->readsRegister(Reg, TRI) && TII->
isPredicated
(DepMI))
IfConversion.cpp
681
bool
isPredicated
= TII->
isPredicated
(I);
688
if (!
isPredicated
) {
703
if (BBI.ClobbersPred && !
isPredicated
) {
[
all
...]
AggressiveAntiDepBreaker.cpp
371
TII->
isPredicated
(MI) || MI->isInlineAsm()) {
449
TII->
isPredicated
(MI) || MI->isInlineAsm();
[
all
...]
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCInstrInfo.h
242
bool
isPredicated
(MCInstrInfo const &MCII, MCInst const &MCI);
HexagonMCChecker.cpp
67
if (HexagonMCInstrInfo::
isPredicated
(MCII, MCI) && isPredicateRegister(R)) {
289
if (HexagonMCInstrInfo::
isPredicated
(MCII, MCI) ||
HexagonMCCodeEmitter.cpp
145
if (!HexagonMCInstrInfo::
isPredicated
(MCII, Inst))
148
assert(HexagonMCInstrInfo::
isPredicated
(MCII, HMB) &&
/external/llvm/lib/Target/PowerPC/
PPCInstrInfo.h
233
bool
isPredicated
(const MachineInstr *MI) const override;
/external/llvm/lib/Target/MSP430/
MSP430InstrInfo.cpp
167
return !
isPredicated
(MI);
/external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp
292
while (
isPredicated
(I) || I->isTerminator() || I->isDebugValue()) {
325
CantAnalyze = !
isPredicated
(I);
333
if (!
isPredicated
(I) &&
441
bool ARMBaseInstrInfo::
isPredicated
(const MachineInstr *MI) const {
[
all
...]
ARMBaseInstrInfo.h
138
bool
isPredicated
(const MachineInstr *MI) const override;
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