| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.h | 60 /// isStoreToStackSlot - If the specified machine instruction is a direct
65 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| SparcInstrInfo.cpp | 60 /// isStoreToStackSlot - If the specified machine instruction is a direct
65 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.h | 45 /// isStoreToStackSlot - If the specified machine instruction is a direct
50 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| XCoreInstrInfo.cpp | 79 /// isStoreToStackSlot - If the specified machine instruction is a direct
85 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.h | 38 /// isStoreToStackSlot - If the specified machine instruction is a direct
43 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| Mips16InstrInfo.h | 38 /// isStoreToStackSlot - If the specified machine instruction is a direct
43 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| Mips16InstrInfo.cpp | 51 /// isStoreToStackSlot - If the specified machine instruction is a direct
56 unsigned Mips16InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
|
| MipsSEInstrInfo.cpp | 58 /// isStoreToStackSlot - If the specified machine instruction is a direct
63 unsigned MipsSEInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 61 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| AArch64InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 157 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| PPCInstrInfo.cpp | 290 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.h | 142 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| SystemZInstrInfo.cpp | 217 unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 54 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| HexagonInstrInfo.cpp | 253 /// isStoreToStackSlot - If the specified machine instruction is a direct
258 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
[all...] |
| /external/llvm/lib/CodeGen/ |
| InlineSpiller.cpp | 257 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
805 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) {
[all...] |
| StackSlotColoring.cpp | 403 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 163 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 208 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| X86FrameLowering.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 205 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
220 /// If not, return false. Unlike isStoreToStackSlot,
[all...] |
