| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow.h | 48 typedef void (*rc_read_write_chan_fn)(void * userdata, struct rc_instruction * inst,
50 void rc_for_all_reads_chan(struct rc_instruction * inst, rc_read_write_chan_fn cb, void * userdata);
51 void rc_for_all_writes_chan(struct rc_instruction * inst, rc_read_write_chan_fn cb, void * userdata);
53 typedef void (*rc_read_write_mask_fn)(void * userdata, struct rc_instruction * inst,
55 void rc_for_all_reads_mask(struct rc_instruction * inst, rc_read_write_mask_fn cb, void * userdata);
56 void rc_for_all_writes_mask(struct rc_instruction * inst, rc_read_write_mask_fn cb, void * userdata);
58 typedef void (*rc_read_src_fn)(void * userdata, struct rc_instruction * inst,
60 void rc_for_all_reads_src(struct rc_instruction * inst, rc_read_src_fn cb,
64 struct rc_instruction * inst, struct rc_pair_instruction_arg * arg,
66 void rc_pair_for_all_reads_arg(struct rc_instruction * inst,
[all...] |
| /external/llvm/lib/IR/ |
| DebugInfo.cpp | 45 auto Inst = std::find_if(BB.begin(), BB.end(), [](const Instruction &Inst) {
46 return Inst.getDebugLoc();
48 if (Inst == BB.end())
50 DebugLoc DLoc = Inst->getDebugLoc();
|
| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.cpp | 151 /// \brief Gets latency information for \p Inst from the itinerary
155 static int getItineraryLatency(LLVMDisasmContext *DC, const MCInst &Inst) {
166 const MCInstrDesc& Desc = DC->getInstrInfo()->get(Inst.getOpcode());
170 for (unsigned OpIdx = 0, OpIdxEnd = Inst.getNumOperands(); OpIdx != OpIdxEnd;
177 /// \brief Gets latency information for \p Inst, based on \p DC information.
180 static int getLatency(LLVMDisasmContext *DC, const MCInst &Inst) {
190 return getItineraryLatency(DC, Inst);
193 const MCInstrDesc& Desc = DC->getInstrInfo()->get(Inst.getOpcode());
215 /// \brief Emits latency information in DC->CommentStream for \p Inst, based
217 static void emitLatency(LLVMDisasmContext *DC, const MCInst &Inst) {
[all...] |
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 133 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI);
137 uint64_t ISAOpCode = Inst & (0x3FFULL << 39);
138 Inst &= ~(0x3FFULL << 39);
139 Inst |= ISAOpCode << 1;
141 Emit(Inst, OS);
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonAsmBackend.cpp | 198 /// \param Inst - The instruction to test.
199 bool mayNeedRelaxation(MCInst const &Inst) const override {
200 assert(HexagonMCInstrInfo::isBundle(Inst));
202 for (auto const &I : HexagonMCInstrInfo::bundleInstructions(Inst)) {
203 auto const &Inst = *I.getInst();
205 if (isInstRelaxable(Inst))
208 PreviousIsExtender = HexagonMCInstrInfo::isImmext(Inst);
297 void relaxInstruction(MCInst const & Inst,
299 assert(HexagonMCInstrInfo::isBundle(Inst) &&
305 for (auto &I : HexagonMCInstrInfo::bundleInstructions(Inst)) {
[all...] |
| HexagonMCTargetDesc.cpp | 83 const MCInst &Inst, const MCSubtargetInfo &STI) override {
84 assert(HexagonMCInstrInfo::isBundle(Inst));
85 assert(HexagonMCInstrInfo::bundleSize(Inst) <= HEXAGON_PACKET_SIZE);
89 InstPrinter.printInst(&Inst, TempStream, "", STI);
155 MCCFIInstruction Inst =
157 MAI->addInitialFrameState(Inst);
238 // Register the MC Inst Printer
|
| HexagonMCCodeEmitter.cpp | 134 MCInst const &Inst = *i->getInst();
135 if (HexagonMCInstrInfo::isImmext(Inst))
139 HexagonMCInstrInfo::hasNewValue(MCII, Inst)
140 ? HexagonMCInstrInfo::getNewValueOperand(MCII, Inst).getReg()
145 if (!HexagonMCInstrInfo::isPredicated(MCII, Inst))
150 if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) ==
169 DEBUG(dbgs() << "Unimplemented inst: "
|
| HexagonMCCompound.cpp | 379 MCInst const *Inst = B->getInst();
380 if (JumpInst == Inst)
382 if (HexagonMCInstrInfo::isImmext(*Inst)) {
387 << Inst->getOpcode() << "\n");
388 if (isOrderedCompoundPair(*Inst, BExtended, *JumpInst, JExtended)) {
389 MCInst *CompoundInsn = getCompoundInsn(Context, *Inst, *JumpInst);
391 DEBUG(dbgs() << "B: " << Inst->getOpcode() << ","
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCTargetDesc.cpp | 83 MCCFIInstruction Inst =
85 MAI->addInitialFrameState(Inst);
|
| /external/llvm/lib/Target/XCore/ |
| XCoreLowerThreadLocal.cpp | 208 Instruction *Inst = cast<Instruction>(U);
209 IRBuilder<> Builder(Inst);
|
| /external/llvm/lib/Transforms/Instrumentation/ |
| BoundsChecking.cpp | 59 Instruction *Inst;
79 Function *Fn = Inst->getParent()->getParent();
88 TrapCall->setDebugLoc(Inst->getDebugLoc());
109 BasicBlock::iterator Inst = Builder->GetInsertPoint();
110 BasicBlock *OldBB = Inst->getParent();
111 BasicBlock *Cont = OldBB->splitBasicBlock(Inst);
190 Inst = *i;
192 Builder->SetInsertPoint(Inst);
193 if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
195 } else if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
[all...] |
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_debug.cpp | 295 MCInst Inst;
305 if (!DisAsm->getInstruction(Inst, Size, memoryObject,
335 Printer->printInst(&Inst, Out, "");
337 Printer->printInst(&Inst, Out);
339 Printer->printInst(&Inst);
350 const MCInstrDesc &TID = TII->get(Inst.getOpcode());
352 const TargetInstrDesc &TID = TII->get(Inst.getOpcode());
360 for (unsigned i = 0; i < Inst.getNumOperands(); ++i) {
361 const MCOperand &operand = Inst.getOperand(i);
|
| /external/llvm/lib/Analysis/ |
| AliasAnalysisEvaluator.cpp | 163 Instruction &Inst = *I;
164 if (auto CS = CallSite(&Inst)) {
177 for (Instruction::op_iterator OI = Inst.op_begin(), OE = Inst.op_end();
|
| CostModel.cpp | 523 Instruction *Inst = &*it;
524 unsigned Cost = getInstructionCost(Inst);
530 OS << " for instruction: "<< *Inst << "\n";
|
| /external/llvm/lib/CodeGen/ |
| StackProtector.cpp | 283 Instruction *Inst = &*I;
287 if (isa<DbgInfoIntrinsic>(Inst))
302 if (CallInst *CI = dyn_cast<CallInst>(Inst)) {
312 NoInterposingChain && InstructionWillNotHaveChain(Inst);
|
| SjLjEHPrepare.cpp | 283 Instruction *Inst = &*II;
284 if (Inst->use_empty())
286 if (Inst->hasOneUse() &&
287 cast<Instruction>(Inst->user_back())->getParent() == BB &&
288 !isa<PHINode>(Inst->user_back()))
293 if (AllocaInst *AI = dyn_cast<AllocaInst>(Inst))
299 for (User *U : Inst->users()) {
307 LiveBBs.insert(Inst->getParent());
318 if (PN->getIncomingValue(i) == Inst)
329 DEBUG(dbgs() << "SJLJ Spill: " << *Inst << " around
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64AddressTypePromotion.cpp | 109 /// - Inst is used only once (no need to insert truncate).
110 /// - Inst has only one operand that will require a sext operation (we do
112 bool shouldGetThrough(const Instruction *Inst);
120 bool canGetThrough(const Instruction *Inst);
157 bool AArch64AddressTypePromotion::canGetThrough(const Instruction *Inst) {
158 if (isa<SExtInst>(Inst))
161 const BinaryOperator *BinOp = dyn_cast<BinaryOperator>(Inst);
167 if (isa<TruncInst>(Inst) && isa<SExtInst>(Inst->getOperand(0))) {
168 const Instruction *Opnd = cast<Instruction>(Inst->getOperand(0))
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 73 bool mayNeedRelaxation(const MCInst &Inst) const override;
77 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override;
226 bool AArch64AsmBackend::mayNeedRelaxation(const MCInst &Inst) const {
241 void AArch64AsmBackend::relaxInstruction(const MCInst &Inst,
329 const MCCFIInstruction &Inst = Instrs[i];
331 switch (Inst.getOperation()) {
337 assert(getXRegFromWReg(MRI.getLLVMRegNum(Inst.getRegister(), true)) ==
365 StackSize = std::abs(Inst.getOffset());
371 unsigned Reg1 = MRI.getLLVMRegNum(Inst.getRegister(), true);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcAsmPrinter.cpp | 135 MCInst Inst;
136 Inst.setOpcode(Opcode);
137 Inst.addOperand(RD);
138 Inst.addOperand(RS1);
139 Inst.addOperand(Src2);
140 OutStreamer.EmitInstruction(Inst, STI);
|
| /external/llvm/lib/Transforms/ObjCARC/ |
| ObjCARCContract.cpp | 76 /// Returns true if we eliminated Inst.
77 bool tryToPeepholeInstruction(Function &F, Instruction *Inst,
216 Instruction *Inst = &*I;
217 if (Inst == Release) {
222 // Otherwise, we check if Inst is a "good" store. Grab the instruction class
223 // of Inst.
224 ARCInstKind Class = GetBasicARCInstKind(Inst);
226 // If Inst is an unrelated retain, we don't care about it.
238 // the RCIdentityRoot of Release. If we can prove we can ignore Inst, so
240 if (!CanUse(Inst, Load, PA, Class))
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopRotation.cpp | 220 Instruction *Inst = &*I++;
228 if (L->hasLoopInvariantOperands(Inst) &&
229 !Inst->mayReadFromMemory() && !Inst->mayWriteToMemory() &&
230 !isa<TerminatorInst>(Inst) && !isa<DbgInfoIntrinsic>(Inst) &&
231 !isa<AllocaInst>(Inst)) {
232 Inst->moveBefore(LoopEntryBranch);
237 Instruction *C = Inst->clone();
252 ValueMap[Inst] = V
[all...] |
| MergedLoadStoreMotion.cpp | 134 void removeInstruction(Instruction *Inst);
183 void MergedLoadStoreMotion::removeInstruction(Instruction *Inst) {
186 MD->removeInstruction(Inst);
187 if (LoadInst *LI = dyn_cast<LoadInst>(Inst))
189 if (Inst->getType()->getScalarType()->isPointerTy()) {
190 MD->invalidateCachedPointerInfo(Inst);
193 Inst->eraseFromParent();
262 Instruction *Inst = &*BBI;
265 if (!isa<LoadInst>(Inst) || Inst->isUsedOutsideOfBlock(BB1)
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| LoopUnroll.cpp | 501 if (Instruction *Inst =
503 RecursivelyDeleteTriviallyDeadInstructions(Inst);
514 Instruction *Inst = &*I++;
516 if (isInstructionTriviallyDead(Inst))
517 (*BB)->getInstList().erase(Inst);
518 else if (Value *V = SimplifyInstruction(Inst, DL))
519 if (LI->replacementPreservesLCSSAForm(Inst, V)) {
520 Inst->replaceAllUsesWith(V);
521 (*BB)->getInstList().erase(Inst);
|
| /external/llvm/utils/TableGen/ |
| InstrInfoEmitter.cpp | 55 void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
71 std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
88 InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
91 for (auto &Op : Inst.Operands) {
180 for (const CodeGenInstruction *Inst : Target.instructions()) {
181 std::vector<std::string> OperandInfo = GetOperandInfo(*Inst);
207 for (const CodeGenInstruction *Inst : NumberedInstructions) {
208 if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable"))
211 for (const auto &Info : Inst->Operands) {
220 OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName())
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUOpenCLImageTypeLoweringPass.cpp | 155 auto Inst = dyn_cast<CallInst>(Use.getUser());
156 if (!Inst) {
160 Function *F = Inst->getCalledFunction();
176 Inst->replaceAllUsesWith(Replacement);
177 InstsToErase.push_back(Inst);
188 auto Inst = dyn_cast<CallInst>(Use.getUser());
189 if (!Inst) {
193 Function *F = Inst->getCalledFunction();
205 Inst->replaceAllUsesWith(Replacement);
206 InstsToErase.push_back(Inst);
[all...] |
