| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips-noinsn32.d | 410 [ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ <test2>
413 [ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
416 [ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
419 [ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
422 [ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
425 [ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
428 [ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
431 [ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
434 [ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
437 [ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+
[all...] |
| micromips-trap.d | 424 [ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ <test2>
427 [ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
430 [ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
433 [ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
436 [ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
439 [ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
442 [ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
445 [ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
448 [ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
451 [ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+
[all...] |
| micromips.d | 424 [ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ <test2>
427 [ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
430 [ 0-9a-f]+: 8e7f beqz a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
433 [ 0-9a-f]+: 8eff beqz a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
436 [ 0-9a-f]+: 8f7f beqz a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
439 [ 0-9a-f]+: 8fff beqz a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
442 [ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
445 [ 0-9a-f]+: 8cff beqz s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
448 [ 0-9a-f]+: 8d7f beqz v0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
451 [ 0-9a-f]+: 8dff beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+
[all...] |
| micromips-insn32.d | 410 [ 0-9a-f]+: 9402 fffe beqz v0,[0-9a-f]+ <test2>
413 [ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
416 [ 0-9a-f]+: 9404 fffe beqz a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
419 [ 0-9a-f]+: 9405 fffe beqz a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
422 [ 0-9a-f]+: 9406 fffe beqz a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
425 [ 0-9a-f]+: 9407 fffe beqz a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
428 [ 0-9a-f]+: 9410 fffe beqz s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
431 [ 0-9a-f]+: 9411 fffe beqz s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
434 [ 0-9a-f]+: 9402 fffe beqz v0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
437 [ 0-9a-f]+: 9403 fffe beqz v1,[0-9a-f]+ <test2\+0x[0-9a-f]+
[all...] |
| mips16-64.d | 645 80a: f3ff 221b beqz v0,4 <insns1>
646 80e: 2288 beqz v0,720 <insns2>
647 810: 222b beqz v0,868 <bar>
648 812: f080 220d beqz v0,930 <quux>
|
| mips16.d | 644 80a: f3ff 221b beqz v0,4 <insns1>
645 80e: 2288 beqz v0,720 <insns2>
646 810: 222b beqz v0,868 <bar>
647 812: f080 220d beqz v0,930 <quux>
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mep/ |
| allinsn.be.d | 505 3e2: b0 02 bra 3e4 <beqz>
507 000003e4 <beqz>:
508 3e4: a1 fe beqz \$1,3e2 <bra\+0x8>
509 3e6: af 02 beqz \$sp,3e8 <beqz\+0x4>
510 3e8: a4 04 beqz \$4,3ec <beqz\+0x8>
511 3ea: a4 00 beqz \$4,3ea <beqz\+0x6>
512 3ec: a9 fe beqz \$9,3ea <beqz\+0x6
[all...] |
| allinsn.le.d | 505 3e2: 02 b0 bra 3e4 <beqz>
507 000003e4 <beqz>:
508 3e4: fe a1 beqz \$1,3e2 <bra\+0x8>
509 3e6: 02 af beqz \$sp,3e8 <beqz\+0x4>
510 3e8: 04 a4 beqz \$4,3ec <beqz\+0x8>
511 3ea: 00 a4 beqz \$4,3ea <beqz\+0x6>
512 3ec: fe a9 beqz \$9,3ea <beqz\+0x6
[all...] |
| dj1.s | 638 beqz $0,.-128+2
640 beqz $15,.-128+2
642 beqz $0,.+126+2
644 beqz $15,.+126+2
646 beqz $0,symbol
648 beqz $15,symbol
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | 411 // if $op == beqz or bnez:
416 // if $op == beqz, then if $rt != 0, then the conditional assignment
590 // Format: BEQZ rx, offset MIPS16e
594 def BeqzRxImm16: FRI16_B_ins<0b00100, "beqz", IIM16Alu>, cbranch16;
598 // Format: BEQZ rx, offset MIPS16e
602 def BeqzRxImmX16: FEXT_RI16_B_ins<0b00100, "beqz", IIM16Alu>, cbranch16;
1034 def SelBeqZ: Sel<"beqz">;
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-nds32.c | 464 "beqz", /* opcode */
472 INSN_BEQZ /* beqz $rt, label */
475 INSN_BEQZ /* beqz $rt, label */
478 INSN_BEQZ /* beqz $rt, label */
655 INSN_BEQZ, /* beqz $rt, $1 */
659 INSN_BEQZ, /* beqz $rt, $1 */
[all...] |
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-12/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-13/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-14/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-15/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-16/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-17/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-18/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-19/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/asm/ |
| asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| dlx.h | 258 { "beqz", BEQOP, "a,d" }, /* Branch if a == 0 */
|
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 538 void MipsAssembler::Beqz(Register rt, uint16_t imm16) {
752 Beqz(rs, imm16);
[all...] |
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| rotate_mips.cc | 115 "beqz %[width], 2f \n"
318 "beqz %[width], 2f \n"
|
| /external/libyuv/files/source/ |
| rotate_mips.cc | 115 "beqz %[width], 2f \n"
318 "beqz %[width], 2f \n"
|
