/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 86 const MachineRegisterInfo *MRI; 117 MRI = &MF.getRegInfo(); 249 const TargetRegisterClass *RC0 = MRI->getRegClass(Reg0);
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/external/llvm/lib/Target/NVPTX/ |
NVPTXInstrInfo.cpp | 36 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 37 const TargetRegisterClass *DestRC = MRI.getRegClass(DestReg); 38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg);
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
lp_bld_debug.cpp | 236 OwningPtr<const MCRegisterInfo> MRI(T->createMCRegInfo(Triple)); 237 if (!MRI) { 251 T->createMCInstPrinter(AsmPrinterVariant, *AsmInfo, *MII, *MRI, *STI));
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.cpp | 37 const MCRegisterInfo &MRI) 38 : MCInstPrinter(MAI, MII, MRI) {} 42 const MCRegisterInfo &MRI) 43 : AArch64InstPrinter(MAI, MII, MRI) {} [all...] |
AArch64InstPrinter.h | 29 const MCRegisterInfo &MRI); 169 const MCRegisterInfo &MRI);
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/external/llvm/lib/CodeGen/ |
CriticalAntiDepBreaker.h | 36 MachineRegisterInfo &MRI;
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MachineCombiner.cpp | 43 MachineRegisterInfo *MRI; 107 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); 197 MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(MO.getReg()); 450 MRI = &MF.getRegInfo();
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MachineTraceMetrics.cpp | 42 MRI(nullptr), Loops(nullptr) { 58 MRI = &MF->getRegInfo(); 610 DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp) 613 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg); 626 const MachineRegisterInfo *MRI) { 646 Deps.push_back(DataDep(MRI, Reg, UseMI->getOperandNo(I))); 657 const MachineRegisterInfo *MRI) { 665 Deps.push_back(DataDep(MRI, Reg, i)); 761 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); 826 getPHIDeps(&UseMI, Deps, TBI.Pred, MTM.MRI); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
R600ISelLowering.h | 54 MachineRegisterInfo & MRI, unsigned dword_offset) const;
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SIFixSGPRLiveRanges.cpp | 112 MachineRegisterInfo &MRI = MF.getRegInfo(); 134 if (TRI->isSGPRClass(MRI.getRegClass(Def))) {
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
HexagonInstPrinter.h | 29 MCRegisterInfo const &MRI);
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HexagonInstPrinter.cpp | 33 MCRegisterInfo const &MRI) 34 : MCInstPrinter(MAI, MII, MRI), MII(MII), HasExtender(false) {
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsAsmBackend.cpp | 443 const MCRegisterInfo &MRI, 450 const MCRegisterInfo &MRI, 457 const MCRegisterInfo &MRI, 463 const MCRegisterInfo &MRI,
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
SystemZMCAsmBackend.cpp | 113 const MCRegisterInfo &MRI,
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/external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
WebAssemblyAsmBackend.cpp | 99 const MCRegisterInfo &MRI,
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/external/llvm/lib/Target/X86/ |
X86OptimizeLEAs.cpp | 89 MachineRegisterInfo *MRI; 149 MRI->getRegClass(DefMI->getOperand(0).getReg())) 276 MRI->clearKillFlags(DefMI->getOperand(0).getReg()); 306 MRI = &MF.getRegInfo();
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/external/v8/src/compiler/ia32/ |
instruction-codes-ia32.h | 136 V(MRI) /* [%r1 + K] */ \
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/external/v8/src/compiler/x64/ |
instruction-codes-x64.h | 164 V(MRI) /* [%r1 + K] */ \
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/external/v8/src/compiler/x87/ |
instruction-codes-x87.h | 119 V(MRI) /* [%r1 + K] */ \
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/toolchain/binutils/binutils-2.25/gas/config/ |
tc-m68hc11.h | 26 /* Define TC_M68K so that we can use the MRI mode. */
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tc-xgate.h | 26 /* Define TC_M68K so that we can use the MRI mode. */
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/toolchain/binutils/binutils-2.25/gold/ |
README | 18 * MRI compatible linker scripts
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-scripts/ |
script.exp | 113 set testname "MRI script"
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/external/llvm/include/llvm/CodeGen/ |
RegisterScavenging.h | 34 MachineRegisterInfo* MRI; 152 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
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/external/llvm/lib/Target/Mips/ |
Mips16FrameLowering.cpp | 53 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 74 unsigned DReg = MRI->getDwarfRegNum(Reg, true);
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