/external/llvm/lib/Target/Hexagon/ |
HexagonBitTracker.cpp | 26 MachineRegisterInfo &mri, 29 : MachineEvaluator(tri, mri), MF(mf), MFI(*mf.getFrameInfo()), TII(tii) { 37 // meter will be passed in a register or in memory. What is given in MRI 42 // from MRI may not correspond to consecutive formal parameters from Func- 82 const TargetRegisterClass *RC = MRI.getRegClass(Reg); 145 // call site, and we should take advantage of this knowledge. The MRI [all...] |
HexagonExpandCondsets.cpp | 96 MachineFunctionPass(ID), HII(0), TRI(0), MRI(0), 120 MachineRegisterInfo *MRI; 359 MRI->clearKillFlags(Reg); 656 const TargetRegisterClass *VC = MRI->getRegClass(RS.Reg); [all...] |
BitTracker.cpp | 45 // const TargetSpecificEvaluator TSE(TRI, MRI); 171 : Trace(false), ME(E), MF(F), MRI(F.getRegInfo()), Map(*new CellMapType) {} 323 const TargetRegisterClass *VC = MRI.getRegClass(RR.Reg); 350 const TargetRegisterClass *C = MRI.getRegClass(RR.Reg); 980 use_iterator End = MRI.use_nodbg_end(); 981 for (use_iterator I = MRI.use_nodbg_begin(Reg); I != End; ++I) { [all...] |
HexagonInstrInfo.cpp | 769 MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo(); 799 MRI.clearKillFlags(SrcSubLo); 809 MRI.clearKillFlags(SrcSubHi); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsOptimizePICCall.cpp | 260 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); 261 MachineInstr *DefMI = MRI.getVRegDef(Reg);
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MipsSEISelDAGToDAG.h | 35 bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
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/external/llvm/lib/Target/NVPTX/InstPrinter/ |
NVPTXInstPrinter.cpp | 32 const MCRegisterInfo &MRI) 33 : MCInstPrinter(MAI, MII, MRI) {}
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/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.h | 205 unsigned Reg, MachineRegisterInfo *MRI) const override; 258 const MachineRegisterInfo *MRI) const override;
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PPCFrameLowering.cpp | 309 const MachineRegisterInfo &MRI = MF->getRegInfo(); 312 if (MRI.isPhysRegModified(VRRegNo[i])) 628 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 871 unsigned Reg = MRI->getDwarfRegNum(BPReg, true); 885 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); 894 unsigned Reg = MRI->getDwarfRegNum(PPC::R30, true); 903 unsigned Reg = MRI->getDwarfRegNum(BPReg, true); 912 unsigned Reg = MRI->getDwarfRegNum(LRReg, true); 929 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); [all...] |
PPCFastISel.cpp | 149 return MRI.getRegClass(Register)->getID() == PPC::VSFRCRegClassID; 152 return MRI.getRegClass(Register)->getID() == PPC::VSSRCRegClassID; 410 MRI.setRegClass(Addr.Base.Reg, &PPC::G8RC_and_G8RC_NOX0RegClass); 463 (ResultReg ? MRI.getRegClass(ResultReg) : 597 AssignedReg ? MRI.getRegClass(AssignedReg) : nullptr; 612 const TargetRegisterClass *RC = MRI.getRegClass(SrcReg); [all...] |
/toolchain/binutils/binutils-2.25/binutils/ |
arsup.c | 1 /* arsup.c - Archive support for MRI compatibility 25 This file looks after requests from arparse.y, to provide the MRI
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/toolchain/binutils/binutils-2.25/gas/ |
expr.c | 296 /* In MRI mode, the number may have a suffix indicating the 609 /* Parse an MRI multi character constant. */ 1006 /* Double quote is the bitwise not operator in MRI mode. */ 1114 /* '$' is the program counter when in MRI mode, or when 1122 /* In MRI mode and on Z80, '$' is also used as the prefix 1213 /* In MRI mode, this is a floating point constant represented [all...] |
read.h | 77 /* This is used to support MRI common sections. */
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struc-symbol.h | 57 /* This is set if the symbol is defined in an MRI common section.
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/external/llvm/lib/Target/ARM/ |
ARMFrameLowering.cpp | 298 const MCRegisterInfo *MRI = Context.getRegisterInfo(); 532 nullptr, MRI->getDwarfRegNum(FramePtr, true), 540 nullptr, MRI->getDwarfRegNum(FramePtr, true))); 575 nullptr, MRI->getDwarfRegNum(Reg, true), MFI->getObjectOffset(FI))); 596 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); 618 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); [all...] |
Thumb2InstrInfo.cpp | 151 MachineRegisterInfo *MRI = &MF.getRegInfo(); 152 MRI->constrainRegClass(SrcReg, &ARM::GPRPair_with_gsub_1_in_rGPRRegClass); 190 MachineRegisterInfo *MRI = &MF.getRegInfo(); 191 MRI->constrainRegClass(DestReg, &ARM::GPRPair_with_gsub_1_in_rGPRRegClass);
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ARMISelLowering.cpp | [all...] |
/toolchain/binutils/binutils-2.25/gas/config/ |
tc-m68k.c | [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineSSAUpdater.h | 55 MachineRegisterInfo *MRI;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.h | 31 MachineRegisterInfo *MRI;
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/external/llvm/lib/Target/SystemZ/ |
SystemZFrameLowering.cpp | 323 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 347 nullptr, MRI->getDwarfRegNum(Reg, true), Offset)); 374 unsigned HardFP = MRI->getDwarfRegNum(SystemZ::R11D, true); 400 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
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/external/llvm/tools/sancov/ |
sancov.cc | 265 std::unique_ptr<const MCRegisterInfo> MRI( 267 FailIfEmpty(MRI, "no register info for target " + TripleName); 270 TheTarget->createMCAsmInfo(*MRI, TripleName)); 274 MCContext Ctx(AsmInfo.get(), MRI.get(), MOFI.get());
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/external/llvm/lib/Target/X86/ |
X86FrameLowering.cpp | 411 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 423 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); 435 const MachineRegisterInfo &MRI = MF.getRegInfo(); 438 ri = MRI.reg_instr_begin(X86::EFLAGS), re = MRI.reg_instr_end(); 544 MachineRegisterInfo &MRI = MF.getRegInfo(); 547 : MRI.createVirtualRegister(RegClass), 549 : MRI.createVirtualRegister(RegClass), 551 : MRI.createVirtualRegister(RegClass), 553 : MRI.createVirtualRegister(RegClass) [all...] |
/external/llvm/lib/CodeGen/ |
LiveDebugVariables.cpp | 248 MachineRegisterInfo &MRI, 253 void computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, 586 MachineRegisterInfo &MRI, LiveIntervals &LIS) { 595 for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg)) { 654 UserValue::computeIntervals(MachineRegisterInfo &MRI, 688 addDefsFromCopies(LI, LocNo, Kills, Defs, MRI, LIS); [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMELFStreamer.cpp | [all...] |