| /external/llvm/test/CodeGen/Mips/msa/ |
| llvm-stress-s3861334421.ll | 41 %B15 = srem i64 %Sl10, 380809
|
| /external/llvm/test/Transforms/ConstProp/ |
| constant-expr.ll | 18 @F = global i1 srem (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
|
| /external/llvm/test/Transforms/LoopReroll/ |
| nonconst_lb.ll | 85 %rem = srem i32 %n, 4
|
| /external/llvm/utils/ |
| llvm.grm | 59 udiv | OptExact sdiv | fdiv | urem | srem | frem ;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 182 case ISD::SREM: return "srem";
|
| /external/llvm/lib/IR/ |
| Instruction.cpp | 221 case SRem: return "srem";
|
| ConstantFold.cpp | [all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| icmp.ll | 437 %A = srem i32 %X, %Y
445 %A = srem i32 %X, %Y
453 %A = srem i32 %X, %Y
461 %A = srem i32 %X, %Y
511 %B = srem i32 %A, %Y
520 %B = srem i32 %A, %Y
834 ; CHECK-NEXT: %A = srem i32 5, %X
838 %A = srem i32 5, %X
[all...] |
| intrinsics.ll | 400 %rem = srem i32 %v1, 1000
410 %rem = srem i32 %v1, 65537
|
| sub.ll | 142 %D = srem i32 %B, %C
146 ; CHECK-NEXT: %[[rem:.*]] = srem i32 %B, %[[sub]]
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCompares.cpp | [all...] |
| InstCombineMulDivRem.cpp | 11 // srem, urem, frem.
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | [all...] |
| Mips64r6InstrInfo.td | 66 class DMOD_DESC : DIVMOD_DESC_BASE<"dmod", GPR64Opnd, srem>;
|
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | 699 // Additional macros to execute binary operations udiv/sdiv/urem/srem since
739 case Instruction::SRem: INTEGER_VECTOR_FUNCTION(srem) break;
781 case Instruction::SRem: R.IntVal = Src1.IntVal.srem(Src2.IntVal); break;
[all...] |
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 790 case Instruction::SRem:
808 case Instruction::SRem:GV.IntVal = LHS.IntVal.srem(RHS.IntVal); break;
[all...] |
| /external/llvm/test/Transforms/InstSimplify/ |
| compare.ll | 536 %A = srem i32 %X, -5
548 %C = srem i32 %B, %Y
559 %D = srem i32 %C, %Y
|
| /external/llvm/include/llvm/Analysis/ |
| InstructionSimplify.h | 127 /// SimplifySRemInst - Given operands for an SRem, see if we can
|
| TargetTransformInfoImpl.h | 68 case Instruction::SRem:
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| avoid-smax-1.ll | 90 %23 = srem i32 %y.14, 2 ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-early-ifcvt.ll | 408 %rem.i144 = srem i32 %add8.i143, %x0
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 90 case ISD::SREM: return LowerSREM(Op, DAG);
|
| /external/llvm/lib/AsmParser/ |
| LLLexer.cpp | 721 INSTKEYWORD(urem, URem); INSTKEYWORD(srem, SRem); INSTKEYWORD(frem, FRem);
|
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
