/external/llvm/lib/IR/ |
Instructions.cpp | 216 unsigned OpNo = getNumOperands(); 218 assert(OpNo < ReservedSpace && "Growing didn't work!"); 220 getOperandList()[OpNo] = Val; [all...] |
Constants.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineSimplifyDemanded.cpp | 29 static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, 32 assert(OpNo < I->getNumOperands() && "Operand index too large"); 35 ConstantInt *OpC = dyn_cast<ConstantInt>(I->getOperand(OpNo)); 45 I->setOperand(OpNo, ConstantInt::get(OpC->getType(), Demanded)); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelDAGToDAG.cpp | 87 const TargetRegisterClass *getOperandRegClass(SDNode *N, unsigned OpNo) const; 175 /// \brief Determine the register class for \p OpNo 177 /// the given operand number \OpNo or NULL if the register class cannot be 180 unsigned OpNo) const { 188 unsigned OpIdx = Desc.getNumDefs() + OpNo; 202 SDValue SubRegOp = N->getOperand(OpNo + 1); [all...] |
SIInstrInfo.cpp | [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.h | 38 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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ARMInstPrinter.cpp | 319 void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 321 const MCOperand &Op = MI->getOperand(OpNo); [all...] |
/external/clang/lib/Sema/ |
SemaStmtAsm.cpp | 65 static bool isOperandMentioned(unsigned OpNo, 73 if (Piece.getOperandNo() == OpNo)
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/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypesGeneric.cpp | 470 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) { 472 assert(OpNo == 1 && "Can only expand the stored value so far");
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SelectionDAGDumper.cpp | 119 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 120 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
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/external/llvm/lib/Target/Mips/ |
MipsSEISelDAGToDAG.cpp | 110 unsigned OpNo = U.getOperandNo(); 115 if (MI->isPHI() || MI->isRegTiedToDefOperand(OpNo) || MI->isPseudo()) [all...] |
MipsSEISelLowering.cpp | [all...] |
/external/llvm/utils/TableGen/ |
CodeGenDAGPatterns.cpp | [all...] |
/external/llvm/lib/Transforms/IPO/ |
GlobalOpt.cpp | [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |
/external/clang/include/clang/AST/ |
Stmt.h | [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | [all...] |
/external/llvm/include/llvm/IR/ |
Constants.h | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
RegisterCoalescer.cpp | 694 unsigned OpNo = &MO - &UseMI->getOperand(0); 700 if (UseMI->isRegTiedToDefOperand(OpNo)) [all...] |
CodeGenPrepare.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | 110 bool tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo, [all...] |
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | 75 bool tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo, [all...] |
X86InstrInfo.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | 136 bool tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo, [all...] |