1 %default { "func":"MterpDoPackedSwitch" } 2 /* 3 * Handle a packed-switch or sparse-switch instruction. In both cases 4 * we decode it and hand it off to a helper function. 5 * 6 * We don't really expect backward branches in a switch statement, but 7 * they're perfectly legal, so we check for them here. 8 * 9 * for: packed-switch, sparse-switch 10 */ 11 /* op vAA, +BBBB */ 12 #if MTERP_PROFILE_BRANCHES 13 FETCH(a0, 1) # a0 <- bbbb (lo) 14 FETCH(a1, 2) # a1 <- BBBB (hi) 15 GET_OPA(a3) # a3 <- AA 16 sll t0, a1, 16 17 or a0, a0, t0 # a0 <- BBBBbbbb 18 GET_VREG(a1, a3) # a1 <- vAA 19 EAS1(a0, rPC, a0) # a0 <- PC + BBBBbbbb*2 20 JAL($func) # a0 <- code-unit branch offset 21 move rINST, v0 22 EXPORT_PC() 23 move a0, rSELF 24 addu a1, rFP, OFF_FP_SHADOWFRAME 25 move a2, rINST 26 JAL(MterpProfileBranch) # (self, shadow_frame, offset) 27 bnez v0, MterpOnStackReplacement # Note: offset must be in rINST 28 addu a1, rINST, rINST # a1 <- byte offset 29 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST 30 bgtz a1, .L${opcode}_finish 31 lw ra, THREAD_FLAGS_OFFSET(rSELF) 32 b MterpCheckSuspendAndContinue 33 #else 34 FETCH(a0, 1) # a0 <- bbbb (lo) 35 FETCH(a1, 2) # a1 <- BBBB (hi) 36 GET_OPA(a3) # a3 <- AA 37 sll t0, a1, 16 38 or a0, a0, t0 # a0 <- BBBBbbbb 39 GET_VREG(a1, a3) # a1 <- vAA 40 EAS1(a0, rPC, a0) # a0 <- PC + BBBBbbbb*2 41 JAL($func) # a0 <- code-unit branch offset 42 move rINST, v0 43 addu a1, rINST, rINST # a1 <- byte offset 44 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST 45 bgtz a1, 1f 46 lw ra, THREAD_FLAGS_OFFSET(rSELF) 47 b MterpCheckSuspendAndContinue 48 1: 49 GET_INST_OPCODE(t0) # extract opcode from rINST 50 GOTO_OPCODE(t0) # jump to next instruction 51 #endif 52 53 %break 54 55 .L${opcode}_finish: 56 GET_INST_OPCODE(t0) # extract opcode from rINST 57 GOTO_OPCODE(t0) # jump to next instruction 58
