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      1     /* const-wide/32 vAA, #+BBBBbbbb */
      2     srl     a2, rINST, 8                # a2 <- AA
      3     lh      a0, 2(rPC)                  # a0 <- bbbb (low)
      4     lh      a1, 4(rPC)                  # a1 <- BBBB (high)
      5     FETCH_ADVANCE_INST 3                # advance rPC, load rINST
      6     ins     a0, a1, 16, 16              # a0 = BBBBbbbb
      7     GET_INST_OPCODE v0                  # extract opcode from rINST
      8     SET_VREG_WIDE a0, a2                # vAA <- +BBBBbbbb
      9     GOTO_OPCODE v0                      # jump to next instruction
     10