1 //===-- TargetSubtargetInfo.cpp - General Target Information ---------------==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file describes the general parts of a Subtarget. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Support/CommandLine.h" 15 #include "llvm/ADT/SmallVector.h" 16 #include "llvm/Target/TargetSubtargetInfo.h" 17 using namespace llvm; 18 19 //--------------------------------------------------------------------------- 20 // TargetSubtargetInfo Class 21 // 22 TargetSubtargetInfo::TargetSubtargetInfo( 23 const Triple &TT, StringRef CPU, StringRef FS, 24 ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD, 25 const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, 26 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, 27 const InstrStage *IS, const unsigned *OC, const unsigned *FP) 28 : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) { 29 } 30 31 TargetSubtargetInfo::~TargetSubtargetInfo() {} 32 33 bool TargetSubtargetInfo::enableAtomicExpand() const { 34 return true; 35 } 36 37 bool TargetSubtargetInfo::enableMachineScheduler() const { 38 return false; 39 } 40 41 bool TargetSubtargetInfo::enableJoinGlobalCopies() const { 42 return enableMachineScheduler(); 43 } 44 45 bool TargetSubtargetInfo::enableRALocalReassignment( 46 CodeGenOpt::Level OptLevel) const { 47 return true; 48 } 49 50 bool TargetSubtargetInfo::enablePostRAScheduler() const { 51 return getSchedModel().PostRAScheduler; 52 } 53 54 bool TargetSubtargetInfo::useAA() const { 55 return false; 56 } 57
