1 /* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude (at) gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23 #ifndef R300_CONTEXT_H 24 #define R300_CONTEXT_H 25 26 #include "draw/draw_vertex.h" 27 28 #include "util/u_blitter.h" 29 30 #include "pipe/p_context.h" 31 #include "util/u_inlines.h" 32 #include "util/u_transfer.h" 33 34 #include "r300_defines.h" 35 #include "r300_screen.h" 36 #include "../../winsys/radeon/drm/radeon_winsys.h" 37 38 struct u_upload_mgr; 39 struct r300_context; 40 struct r300_fragment_shader; 41 struct r300_vertex_shader; 42 struct r300_stencilref_context; 43 44 enum colormask_swizzle { 45 COLORMASK_BGRA, 46 COLORMASK_RGBA, 47 COLORMASK_RRRR, 48 COLORMASK_AAAA, 49 COLORMASK_GRRG, 50 COLORMASK_ARRA, 51 COLORMASK_NUM_SWIZZLES 52 }; 53 54 struct r300_atom { 55 /* Name, for debugging. */ 56 const char* name; 57 /* Opaque state. */ 58 void* state; 59 /* Emit the state to the context. */ 60 void (*emit)(struct r300_context*, unsigned, void*); 61 /* Upper bound on number of dwords to emit. */ 62 unsigned size; 63 /* Whether this atom should be emitted. */ 64 boolean dirty; 65 /* Whether this atom may be emitted with state == NULL. */ 66 boolean allow_null_state; 67 }; 68 69 struct r300_aa_state { 70 struct r300_surface *dest; 71 72 uint32_t aa_config; 73 uint32_t aaresolve_ctl; 74 }; 75 76 struct r300_blend_state { 77 struct pipe_blend_state state; 78 79 uint32_t cb_clamp[COLORMASK_NUM_SWIZZLES][8]; 80 uint32_t cb_noclamp[8]; 81 uint32_t cb_no_readwrite[8]; 82 }; 83 84 struct r300_blend_color_state { 85 struct pipe_blend_color state; 86 uint32_t cb[3]; 87 }; 88 89 struct r300_clip_state { 90 uint32_t cb[29]; 91 }; 92 93 struct r300_dsa_state { 94 struct pipe_depth_stencil_alpha_state dsa; 95 96 /* This is actually a command buffer with named dwords. */ 97 uint32_t cb_begin; 98 uint32_t alpha_function; /* R300_FG_ALPHA_FUNC: 0x4bd4 */ 99 uint32_t cb_reg_seq; 100 uint32_t z_buffer_control; /* R300_ZB_CNTL: 0x4f00 */ 101 uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */ 102 uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */ 103 uint32_t cb_reg; 104 uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */ 105 uint32_t cb_reg1; 106 uint32_t alpha_value; /* R500_FG_ALPHA_VALUE: 0x4be0 */ 107 108 /* The same, but for FP16 alpha test. */ 109 uint32_t cb_begin_fp16; 110 uint32_t alpha_function_fp16; /* R300_FG_ALPHA_FUNC: 0x4bd4 */ 111 uint32_t cb_reg_seq_fp16; 112 uint32_t z_buffer_control_fp16; /* R300_ZB_CNTL: 0x4f00 */ 113 uint32_t z_stencil_control_fp16; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */ 114 uint32_t stencil_ref_mask_fp16; /* R300_ZB_STENCILREFMASK: 0x4f08 */ 115 uint32_t cb_reg_fp16; 116 uint32_t stencil_ref_bf_fp16; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */ 117 uint32_t cb_reg1_fp16; 118 uint32_t alpha_value_fp16; /* R500_FG_ALPHA_VALUE: 0x4be0 */ 119 120 /* The second command buffer disables zbuffer reads and writes. */ 121 uint32_t cb_zb_no_readwrite[10]; 122 uint32_t cb_fp16_zb_no_readwrite[10]; 123 124 /* Whether a two-sided stencil is enabled. */ 125 boolean two_sided; 126 /* Whether a fallback should be used for a two-sided stencil ref value. */ 127 boolean two_sided_stencil_ref; 128 }; 129 130 struct r300_hyperz_state { 131 int flush; 132 /* This is actually a command buffer with named dwords. */ 133 uint32_t cb_flush_begin; 134 uint32_t zb_zcache_ctlstat; /* R300_ZB_CACHE_CNTL */ 135 uint32_t cb_begin; 136 uint32_t zb_bw_cntl; /* R300_ZB_BW_CNTL */ 137 uint32_t cb_reg1; 138 uint32_t zb_depthclearvalue; /* R300_ZB_DEPTHCLEARVALUE */ 139 uint32_t cb_reg2; 140 uint32_t sc_hyperz; /* R300_SC_HYPERZ */ 141 uint32_t cb_reg3; 142 uint32_t gb_z_peq_config; /* R300_GB_Z_PEQ_CONFIG: 0x4028 */ 143 }; 144 145 struct r300_gpu_flush { 146 uint32_t cb_flush_clean[6]; 147 }; 148 149 #define RS_STATE_MAIN_SIZE 27 150 151 struct r300_rs_state { 152 /* Original rasterizer state. */ 153 struct pipe_rasterizer_state rs; 154 /* Draw-specific rasterizer state. */ 155 struct pipe_rasterizer_state rs_draw; 156 157 /* Command buffers. */ 158 uint32_t cb_main[RS_STATE_MAIN_SIZE]; 159 uint32_t cb_poly_offset_zb16[5]; 160 uint32_t cb_poly_offset_zb24[5]; 161 162 /* The index to cb_main where the cull_mode register value resides. */ 163 unsigned cull_mode_index; 164 165 /* Whether polygon offset is enabled. */ 166 boolean polygon_offset_enable; 167 168 /* This is emitted in the draw function. */ 169 uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */ 170 }; 171 172 struct r300_rs_block { 173 uint32_t vap_vtx_state_cntl; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */ 174 uint32_t vap_vsm_vtx_assm; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */ 175 uint32_t vap_out_vtx_fmt[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */ 176 uint32_t gb_enable; 177 178 uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */ 179 uint32_t count; /* R300_RS_COUNT */ 180 uint32_t inst_count; /* R300_RS_INST_COUNT */ 181 uint32_t inst[8]; /* R300_RS_INST_[0-7] */ 182 }; 183 184 struct r300_sampler_state { 185 struct pipe_sampler_state state; 186 187 uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */ 188 uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */ 189 190 /* Min/max LOD must be clamped to [0, last_level], thus 191 * it's dependent on a currently bound texture */ 192 unsigned min_lod, max_lod; 193 }; 194 195 struct r300_texture_format_state { 196 uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */ 197 uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */ 198 uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */ 199 uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */ 200 uint32_t us_format0; /* R500_US_FORMAT0_0: 0x4640 (through 15) */ 201 }; 202 203 struct r300_sampler_view { 204 struct pipe_sampler_view base; 205 206 /* For resource_copy_region. */ 207 unsigned width0_override; 208 unsigned height0_override; 209 210 /* Swizzles in the UTIL_FORMAT_SWIZZLE_* representation, 211 * derived from base. */ 212 unsigned char swizzle[4]; 213 214 /* Copy of r300_texture::texture_format_state with format-specific bits 215 * added. */ 216 struct r300_texture_format_state format; 217 218 /* The texture cache region for this texture. */ 219 uint32_t texcache_region; 220 }; 221 222 struct r300_texture_sampler_state { 223 struct r300_texture_format_state format; 224 uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */ 225 uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */ 226 uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */ 227 }; 228 229 struct r300_textures_state { 230 /* Textures. */ 231 struct r300_sampler_view *sampler_views[16]; 232 int sampler_view_count; 233 /* Sampler states. */ 234 struct r300_sampler_state *sampler_states[16]; 235 int sampler_state_count; 236 237 /* This is the merge of the texture and sampler states. */ 238 unsigned count; 239 uint32_t tx_enable; /* R300_TX_ENABLE: 0x4101 */ 240 struct r300_texture_sampler_state regs[16]; 241 }; 242 243 struct r300_vertex_stream_state { 244 /* R300_VAP_PROG_STREAK_CNTL_[0-7] */ 245 uint32_t vap_prog_stream_cntl[8]; 246 /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */ 247 uint32_t vap_prog_stream_cntl_ext[8]; 248 249 unsigned count; 250 }; 251 252 struct r300_invariant_state { 253 uint32_t cb[24]; 254 }; 255 256 struct r300_vap_invariant_state { 257 uint32_t cb[11]; 258 }; 259 260 struct r300_viewport_state { 261 float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */ 262 float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */ 263 float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */ 264 float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */ 265 float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */ 266 float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */ 267 uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */ 268 }; 269 270 struct r300_ztop_state { 271 uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */ 272 }; 273 274 /* The next several objects are not pure Radeon state; they inherit from 275 * various Gallium classes. */ 276 277 struct r300_constant_buffer { 278 /* Buffer of constants */ 279 uint32_t *ptr; 280 /* Remapping table. */ 281 unsigned *remap_table; 282 /* const buffer base */ 283 uint32_t buffer_base; 284 }; 285 286 /* Query object. 287 * 288 * This is not a subclass of pipe_query because pipe_query is never 289 * actually fully defined. So, rather than have it as a member, and do 290 * subclass-style casting, we treat pipe_query as an opaque, and just 291 * trust that our state tracker does not ever mess up query objects. 292 */ 293 struct r300_query { 294 /* The kind of query. Currently only OQ is supported. */ 295 unsigned type; 296 /* The number of pipes where query results are stored. */ 297 unsigned num_pipes; 298 /* How many results have been written, in dwords. It's incremented 299 * after end_query and flush. */ 300 unsigned num_results; 301 /* if begin has been emitted */ 302 boolean begin_emitted; 303 304 /* The buffer where query results are stored. */ 305 struct pb_buffer *buf; 306 struct radeon_winsys_cs_handle *cs_buf; 307 }; 308 309 struct r300_surface { 310 struct pipe_surface base; 311 312 /* Winsys buffer backing the texture. */ 313 struct pb_buffer *buf; 314 struct radeon_winsys_cs_handle *cs_buf; 315 316 enum radeon_bo_domain domain; 317 318 uint32_t offset; /* COLOROFFSET or DEPTHOFFSET. */ 319 uint32_t pitch; /* COLORPITCH or DEPTHPITCH. */ 320 uint32_t pitch_zmask; /* ZMASK_PITCH */ 321 uint32_t pitch_hiz; /* HIZ_PITCH */ 322 uint32_t format; /* US_OUT_FMT or ZB_FORMAT. */ 323 324 /* Parameters dedicated to the CBZB clear. */ 325 uint32_t cbzb_width; /* Aligned width. */ 326 uint32_t cbzb_height; /* Half of the height. */ 327 uint32_t cbzb_midpoint_offset; /* DEPTHOFFSET. */ 328 uint32_t cbzb_pitch; /* DEPTHPITCH. */ 329 uint32_t cbzb_format; /* ZB_FORMAT. */ 330 331 /* Whether the CBZB clear is allowed on the surface. */ 332 boolean cbzb_allowed; 333 334 unsigned colormask_swizzle; 335 }; 336 337 struct r300_texture_desc { 338 /* Width, height, and depth. 339 * Most of the time, these are equal to pipe_texture::width0, height0, 340 * and depth0. However, NPOT 3D textures must have dimensions aligned 341 * to POT, and this is the only case when these variables differ from 342 * pipe_texture. */ 343 unsigned width0, height0, depth0; 344 345 /* Buffer tiling. 346 * Macrotiling is specified per-level because small mipmaps cannot 347 * be macrotiled. */ 348 enum radeon_bo_layout microtile; 349 enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS]; 350 351 /* Offsets into the buffer. */ 352 unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS]; 353 354 /* Strides for each mip-level. */ 355 unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS]; 356 357 /* Size of one zslice or face or 2D image based on the texture target. */ 358 unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS]; 359 360 /* Total size of this texture, in bytes, 361 * derived from the texture properties. */ 362 unsigned size_in_bytes; 363 364 /** 365 * If non-zero, override the natural texture layout with 366 * a custom stride (in bytes). 367 * 368 * \note Mipmapping fails for textures with a non-natural layout! 369 * 370 * \sa r300_texture_get_stride 371 */ 372 unsigned stride_in_bytes_override; 373 374 /* Whether this texture has non-power-of-two dimensions. 375 * It can be either a regular texture or a rectangle one. */ 376 boolean is_npot; 377 378 /* This flag says that hardware must use the stride for addressing 379 * instead of the width. */ 380 boolean uses_stride_addressing; 381 382 /* Whether CBZB fast color clear is allowed on the miplevel. */ 383 boolean cbzb_allowed[R300_MAX_TEXTURE_LEVELS]; 384 385 /* Zbuffer compression info for each miplevel. */ 386 boolean zcomp8x8[R300_MAX_TEXTURE_LEVELS]; 387 /* If zero, then disable Z compression/HiZ. */ 388 unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS]; 389 unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS]; 390 /* Zmask/HiZ strides for each miplevel. */ 391 unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS]; 392 unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS]; 393 }; 394 395 struct r300_resource 396 { 397 struct u_resource b; 398 399 /* Winsys buffer backing this resource. */ 400 struct pb_buffer *buf; 401 struct radeon_winsys_cs_handle *cs_buf; 402 enum radeon_bo_domain domain; 403 404 /* Constant buffers and SWTCL vertex and index buffers are in user 405 * memory. */ 406 uint8_t *malloced_buffer; 407 408 /* Texture description (addressing, layout, special features). */ 409 struct r300_texture_desc tex; 410 411 /* This is the level tiling flags were last time set for. 412 * It's used to prevent redundant tiling-flags changes from happening.*/ 413 unsigned surface_level; 414 }; 415 416 struct r300_vertex_element_state { 417 unsigned count; 418 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; 419 unsigned format_size[PIPE_MAX_ATTRIBS]; 420 421 /* The size of the vertex, in dwords. */ 422 unsigned vertex_size_dwords; 423 424 struct r300_vertex_stream_state vertex_stream; 425 }; 426 427 enum r300_hiz_func { 428 HIZ_FUNC_NONE, 429 430 /* The function, when determined, is set in stone 431 * until the next HiZ clear. */ 432 433 /* MAX is written to the HiZ buffer. 434 * Used for LESS, LEQUAL. */ 435 HIZ_FUNC_MAX, 436 437 /* MIN is written to the HiZ buffer. 438 * Used for GREATER, GEQUAL. */ 439 HIZ_FUNC_MIN, 440 }; 441 442 /* For deferred fragment shader state validation. */ 443 enum r300_fs_validity_status { 444 FRAGMENT_SHADER_VALID, /* No need to change/validate the FS. */ 445 FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */ 446 FRAGMENT_SHADER_DIRTY /* Always validate the FS (if the FS was changed) */ 447 }; 448 449 struct r300_context { 450 /* Parent class */ 451 struct pipe_context context; 452 453 /* The interface to the windowing system, etc. */ 454 struct radeon_winsys *rws; 455 /* The command stream. */ 456 struct radeon_winsys_cs *cs; 457 /* Screen. */ 458 struct r300_screen *screen; 459 460 /* Draw module. Used mostly for SW TCL. */ 461 struct draw_context* draw; 462 /* Vertex buffer for SW TCL. */ 463 struct pipe_resource* vbo; 464 /* Offset and size into the SW TCL VBO. */ 465 size_t draw_vbo_offset; 466 size_t draw_vbo_size; 467 /* Whether the VBO must not be flushed. */ 468 boolean draw_vbo_locked; 469 boolean draw_first_emitted; 470 471 /* Accelerated blit support. */ 472 struct blitter_context* blitter; 473 /* Stencil two-sided reference value fallback. */ 474 struct r300_stencilref_context *stencilref_fallback; 475 476 /* The KIL opcode needs the first texture unit to be enabled 477 * on r3xx-r4xx. In order to calm down the CS checker, we bind this 478 * dummy texture there. */ 479 struct r300_sampler_view *texkill_sampler; 480 481 /* When no vertex buffer is set, this one is used instead to prevent 482 * hardlocks. */ 483 struct pipe_vertex_buffer dummy_vb; 484 485 /* The currently active query. */ 486 struct r300_query *query_current; 487 /* The saved query for blitter operations. */ 488 struct r300_query *blitter_saved_query; 489 /* Query list. */ 490 struct r300_query query_list; 491 492 /* Various CSO state objects. */ 493 494 /* Each atom is emitted in the order it appears here, which can affect 495 * performance and stability if not handled with care. */ 496 /* GPU flush. */ 497 struct r300_atom gpu_flush; 498 /* Anti-aliasing (MSAA) state. */ 499 struct r300_atom aa_state; 500 /* Framebuffer state. */ 501 struct r300_atom fb_state; 502 /* HyperZ state (various SC/ZB bits). */ 503 struct r300_atom hyperz_state; 504 /* ZTOP state. */ 505 struct r300_atom ztop_state; 506 /* Depth, stencil, and alpha state. */ 507 struct r300_atom dsa_state; 508 /* Blend state. */ 509 struct r300_atom blend_state; 510 /* Blend color state. */ 511 struct r300_atom blend_color_state; 512 /* Scissor state. */ 513 struct r300_atom scissor_state; 514 /* Invariant state. This must be emitted to get the engine started. */ 515 struct r300_atom invariant_state; 516 /* Viewport state. */ 517 struct r300_atom viewport_state; 518 /* PVS flush. */ 519 struct r300_atom pvs_flush; 520 /* VAP invariant state. */ 521 struct r300_atom vap_invariant_state; 522 /* Vertex stream formatting state. */ 523 struct r300_atom vertex_stream_state; 524 /* Vertex shader. */ 525 struct r300_atom vs_state; 526 /* User clip planes. */ 527 struct r300_atom clip_state; 528 /* RS block state + VAP (vertex shader) output mapping state. */ 529 struct r300_atom rs_block_state; 530 /* Rasterizer state. */ 531 struct r300_atom rs_state; 532 /* Framebuffer state (pipelined regs). */ 533 struct r300_atom fb_state_pipelined; 534 /* Fragment shader. */ 535 struct r300_atom fs; 536 /* Fragment shader RC_CONSTANT_STATE variables. */ 537 struct r300_atom fs_rc_constant_state; 538 /* Fragment shader constant buffer. */ 539 struct r300_atom fs_constants; 540 /* Vertex shader constant buffer. */ 541 struct r300_atom vs_constants; 542 /* Texture cache invalidate. */ 543 struct r300_atom texture_cache_inval; 544 /* Textures state. */ 545 struct r300_atom textures_state; 546 /* HiZ clear */ 547 struct r300_atom hiz_clear; 548 /* zmask clear */ 549 struct r300_atom zmask_clear; 550 /* Occlusion query. */ 551 struct r300_atom query_start; 552 553 /* The pointers to the first and the last atom. */ 554 struct r300_atom *first_dirty, *last_dirty; 555 556 /* Vertex elements for Gallium. */ 557 struct r300_vertex_element_state *velems; 558 559 /* Vertex info for Draw. */ 560 struct vertex_info vertex_info; 561 562 struct pipe_stencil_ref stencil_ref; 563 struct pipe_viewport_state viewport; 564 565 /* Stream locations for SWTCL. */ 566 int stream_loc_notcl[16]; 567 568 /* Flag indicating whether or not the HW is dirty. */ 569 uint32_t dirty_hw; 570 /* Whether polygon offset is enabled. */ 571 boolean polygon_offset_enabled; 572 /* Z buffer bit depth. */ 573 uint32_t zbuffer_bpp; 574 /* Whether rendering is conditional and should be skipped. */ 575 boolean skip_rendering; 576 /* The flag above saved by blitter. */ 577 unsigned char blitter_saved_skip_rendering; 578 /* Point sprites texcoord index, 1 bit per texcoord */ 579 int sprite_coord_enable; 580 /* Whether two-sided color selection is enabled (AKA light_twoside). */ 581 boolean two_sided_color; 582 /* Whether fast color clear is enabled. */ 583 boolean cbzb_clear; 584 /* Whether fragment shader needs to be validated. */ 585 enum r300_fs_validity_status fs_status; 586 /* Framebuffer multi-write. */ 587 boolean fb_multiwrite; 588 589 void *dsa_decompress_zmask; 590 591 struct pipe_index_buffer index_buffer; 592 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; 593 unsigned nr_vertex_buffers; 594 struct u_upload_mgr *uploader; 595 596 struct util_slab_mempool pool_transfers; 597 598 /* Stat counter. */ 599 uint64_t flush_counter; 600 601 /* const tracking for VS */ 602 int vs_const_base; 603 604 /* Vertex array state info */ 605 boolean vertex_arrays_dirty; 606 boolean vertex_arrays_indexed; 607 int vertex_arrays_offset; 608 int vertex_arrays_instance_id; 609 boolean instancing_enabled; 610 611 /* Hyper-Z stats. */ 612 boolean hyperz_enabled; /* Whether it owns Hyper-Z access. */ 613 int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */ 614 unsigned num_z_clears; /* Since the last flush. */ 615 616 /* ZMask state. */ 617 boolean zmask_in_use; /* Whether ZMASK is enabled. */ 618 boolean zmask_decompress; /* Whether ZMASK is being decompressed. */ 619 struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */ 620 621 /* HiZ state. */ 622 boolean hiz_in_use; /* Whether HIZ is enabled. */ 623 enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */ 624 uint32_t hiz_clear_value; /* HiZ clear value. */ 625 }; 626 627 #define foreach_atom(r300, atom) \ 628 for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++) 629 630 #define foreach_dirty_atom(r300, atom) \ 631 for (atom = r300->first_dirty; atom != r300->last_dirty; atom++) 632 633 /* Convenience cast wrappers. */ 634 static INLINE struct r300_query* r300_query(struct pipe_query* q) 635 { 636 return (struct r300_query*)q; 637 } 638 639 static INLINE struct r300_surface* r300_surface(struct pipe_surface* surf) 640 { 641 return (struct r300_surface*)surf; 642 } 643 644 static INLINE struct r300_resource* r300_resource(struct pipe_resource* tex) 645 { 646 return (struct r300_resource*)tex; 647 } 648 649 static INLINE struct r300_context* r300_context(struct pipe_context* context) 650 { 651 return (struct r300_context*)context; 652 } 653 654 static INLINE struct r300_fragment_shader *r300_fs(struct r300_context *r300) 655 { 656 return (struct r300_fragment_shader*)r300->fs.state; 657 } 658 659 static INLINE void r300_mark_atom_dirty(struct r300_context *r300, 660 struct r300_atom *atom) 661 { 662 atom->dirty = TRUE; 663 664 if (!r300->first_dirty) { 665 r300->first_dirty = atom; 666 r300->last_dirty = atom+1; 667 } else { 668 if (atom < r300->first_dirty) 669 r300->first_dirty = atom; 670 else if (atom+1 > r300->last_dirty) 671 r300->last_dirty = atom+1; 672 } 673 } 674 675 struct pipe_context* r300_create_context(struct pipe_screen* screen, 676 void *priv); 677 678 /* Context initialization. */ 679 struct draw_stage* r300_draw_stage(struct r300_context* r300); 680 void r300_init_blit_functions(struct r300_context *r300); 681 void r300_init_flush_functions(struct r300_context* r300); 682 void r300_init_query_functions(struct r300_context* r300); 683 void r300_init_render_functions(struct r300_context *r300); 684 void r300_init_state_functions(struct r300_context* r300); 685 void r300_init_resource_functions(struct r300_context* r300); 686 687 /* r300_blit.c */ 688 void r300_decompress_zmask(struct r300_context *r300); 689 void r300_decompress_zmask_locked_unsafe(struct r300_context *r300); 690 void r300_decompress_zmask_locked(struct r300_context *r300); 691 bool r300_is_blit_supported(enum pipe_format format); 692 693 /* r300_flush.c */ 694 void r300_flush(struct pipe_context *pipe, 695 unsigned flags, 696 struct pipe_fence_handle **fence); 697 698 /* r300_hyperz.c */ 699 void r300_update_hyperz_state(struct r300_context* r300); 700 701 /* r300_query.c */ 702 void r300_resume_query(struct r300_context *r300, 703 struct r300_query *query); 704 void r300_stop_query(struct r300_context *r300); 705 706 /* r300_render_translate.c */ 707 void r300_translate_index_buffer(struct r300_context *r300, 708 struct pipe_index_buffer *ib, 709 struct pipe_resource **out_index_buffer, 710 unsigned *index_size, unsigned index_offset, 711 unsigned *start, unsigned count); 712 713 /* r300_render_stencilref.c */ 714 void r300_plug_in_stencil_ref_fallback(struct r300_context *r300); 715 716 /* r300_render.c */ 717 void r300_draw_flush_vbuf(struct r300_context *r300); 718 void r500_emit_index_bias(struct r300_context *r300, int index_bias); 719 void r300_blitter_draw_rectangle(struct blitter_context *blitter, 720 unsigned x1, unsigned y1, 721 unsigned x2, unsigned y2, 722 float depth, 723 enum blitter_attrib_type type, 724 const union pipe_color_union *attrib); 725 726 /* r300_state.c */ 727 enum r300_fb_state_change { 728 R300_CHANGED_FB_STATE = 0, 729 R300_CHANGED_HYPERZ_FLAG, 730 R300_CHANGED_MULTIWRITE 731 }; 732 733 void r300_mark_fb_state_dirty(struct r300_context *r300, 734 enum r300_fb_state_change change); 735 void r300_mark_fs_code_dirty(struct r300_context *r300); 736 737 struct pipe_sampler_view * 738 r300_create_sampler_view_custom(struct pipe_context *pipe, 739 struct pipe_resource *texture, 740 const struct pipe_sampler_view *templ, 741 unsigned width0_override, 742 unsigned height0_override); 743 744 /* r300_state_derived.c */ 745 void r300_update_derived_state(struct r300_context* r300); 746 747 /* r300_debug.c */ 748 void r500_dump_rs_block(struct r300_rs_block *rs); 749 750 751 static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags) 752 { 753 return SCREEN_DBG_ON(ctx->screen, flags); 754 } 755 756 static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags, 757 const char * fmt, ...) 758 { 759 if (CTX_DBG_ON(ctx, flags)) { 760 va_list va; 761 va_start(va, fmt); 762 vfprintf(stderr, fmt, va); 763 va_end(va); 764 } 765 } 766 767 #define DBG_ON CTX_DBG_ON 768 #define DBG CTX_DBG 769 770 #endif /* R300_CONTEXT_H */ 771
