| /device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Library/BeagleBoardLib/ |
| Clock.c | 33 MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
35 MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
38 MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
39 MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
42 MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
44 MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
48 MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
55 MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
65 MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
67 MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Sec/ |
| Clock.c | 33 MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
35 MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
38 MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
39 MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
42 MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
44 MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
48 MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
56 MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
66 MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
68 MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
[all...] |
| /device/linaro/bootloader/edk2/BeagleBoardPkg/Library/BeagleBoardLib/ |
| Clock.c | 33 MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
35 MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
38 MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
39 MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
42 MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
44 MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
48 MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
55 MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
65 MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
67 MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
[all...] |
| /device/linaro/bootloader/edk2/BeagleBoardPkg/Sec/ |
| Clock.c | 33 MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
35 MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
38 MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
39 MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
42 MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
44 MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
48 MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
56 MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
66 MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
68 MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmGic/ |
| ArmGicNonSecLib.c | 36 MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2);
38 MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
|
| /device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ |
| ArmCortexA9Lib.c | 72 MmioOr32 (ScuBase + A9_SCU_SACR_OFFSET, 0xf);
74 MmioOr32 (ScuBase + A9_SCU_SSACR_OFFSET, 0xfff);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ |
| RTSMSec.c | 67 MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
69 MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/MmcHostDxe/ |
| MmcHostDxe.c | 245 MmioOr32 (MMCHS_SYSCTL, CEN);
269 MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
382 MmioOr32 (MMCHS_SYSCTL, SRC);
440 MmioOr32 (MMCHS_CAPA, (VS30 | VS18));
443 MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);
444 MmioOr32 (MMCHS_HCTL, IWE);
447 MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));
452 MmioOr32 (MMCHS_SYSCTL, ICE);
458 MmioOr32 (MMCHS_HCTL, (SDBP_ON));
468 MmioOr32 (MMCHS_CON, INIT);
[all...] |
| /device/linaro/bootloader/edk2/Omap35xxPkg/MmcHostDxe/ |
| MmcHostDxe.c | 245 MmioOr32 (MMCHS_SYSCTL, CEN);
269 MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
382 MmioOr32 (MMCHS_SYSCTL, SRC);
440 MmioOr32 (MMCHS_CAPA, (VS30 | VS18));
443 MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);
444 MmioOr32 (MMCHS_HCTL, IWE);
447 MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));
452 MmioOr32 (MMCHS_SYSCTL, ICE);
458 MmioOr32 (MMCHS_HCTL, (SDBP_ON));
468 MmioOr32 (MMCHS_CON, INIT);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/ResetSystemLib/ |
| ResetSystemLib.c | 60 MmioOr32 (PRM_RSTCTRL, RST_DPLL3);
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/ResetSystemLib/ |
| ResetSystemLib.c | 60 MmioOr32 (PRM_RSTCTRL, RST_DPLL3);
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/ |
| ExI.c | 99 MmioOr32 ((UINTN) (GetPmcBase() + R_PCH_PMC_MTPMC1), (UINT32) BIT0+BIT1+BIT2);
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/MMCHSDxe/ |
| MMCHS.c | 105 MmioOr32 (MMCHS_SYSCTL, CEN);
150 MmioOr32 (MMCHS_SYSCTL, SRC);
364 MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
394 MmioOr32 (MMCHS_CON, INIT);
402 MmioOr32 (MMCHS_STAT, CC);
411 MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));
416 MmioOr32 (MMCHS_CON, OD);
438 MmioOr32 (MMCHS_SYSCTL, SRC);
459 MmioOr32 (MMCHS_SYSCTL, SRC);
562 MmioOr32 (MMCHS_HCTL, SDVS_3_0_V);
[all...] |
| /device/linaro/bootloader/edk2/Omap35xxPkg/MMCHSDxe/ |
| MMCHS.c | 105 MmioOr32 (MMCHS_SYSCTL, CEN);
150 MmioOr32 (MMCHS_SYSCTL, SRC);
364 MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
394 MmioOr32 (MMCHS_CON, INIT);
402 MmioOr32 (MMCHS_STAT, CC);
411 MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));
416 MmioOr32 (MMCHS_CON, OD);
438 MmioOr32 (MMCHS_SYSCTL, SRC);
459 MmioOr32 (MMCHS_SYSCTL, SRC);
562 MmioOr32 (MMCHS_HCTL, SDVS_3_0_V);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/LcdGraphicsOutputDxe/ |
| LcdGraphicsOutputDxe.c | 154 MmioOr32 (CM_FCLKEN_DSS, (EN_DSS1 | EN_DSS2 | EN_TV));
181 MmioOr32 (DISPC_CONFIG, LOAD_FRAME_ONLY);
197 MmioOr32 (DISPC_CONTROL, (LCDENABLE | ACTIVEMATRIX | DATALINES24 | BYPASS_MODE | LCDENABLESIGNAL));
198 MmioOr32 (DISPC_CONTROL, GOLCD);
242 MmioOr32 (GPIO6_BASE + GPIO_SETDATAOUT, BIT10);
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/LcdGraphicsOutputDxe/ |
| LcdGraphicsOutputDxe.c | 154 MmioOr32 (CM_FCLKEN_DSS, (EN_DSS1 | EN_DSS2 | EN_TV));
181 MmioOr32 (DISPC_CONFIG, LOAD_FRAME_ONLY);
197 MmioOr32 (DISPC_CONTROL, (LCDENABLE | ACTIVEMATRIX | DATALINES24 | BYPASS_MODE | LCDENABLESIGNAL));
198 MmioOr32 (DISPC_CONTROL, GOLCD);
242 MmioOr32 (GPIO6_BASE + GPIO_SETDATAOUT, BIT10);
|
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/ |
| DebugCommunicationLibUsb.c | 296 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, (UINT32)BIT5);
311 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, BIT16);
385 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, Length & 0xF);
393 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, BIT4);
397 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, BIT5);
412 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, BIT16);
632 MmioOr32((UINTN)UsbCmd, BIT1);
638 MmioOr32((UINTN)UsbCmd, BIT0);
646 MmioOr32((UINTN)&UsbDebugPortRegister->ControlStatus, USB_DEBUG_PORT_OWNER | USB_DEBUG_PORT_IN_USE);
669 MmioOr32((UINTN)PortStatus, BIT8);
[all...] |
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ |
| CTA9x4.c | 141 MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
143 MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Library/SP804TimerLib/ |
| SP804TimerLib.c | 42 MmioOr32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
51 MmioOr32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/ |
| UartInit.c | 189 MmioOr32 (IO_BASE_ADDRESS + 0x0520, (UINT32)0x81); // UART3_RXD-L
191 MmioOr32 (IO_BASE_ADDRESS + 0x0530, (UINT32)0x1); // UART3_RXD-L
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/SP805WatchdogDxe/ |
| SP805Watchdog.c | 97 MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
350 MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/DebugAgentTimerLib/ |
| DebugAgentTimerLib.c | 99 MmioOr32 (CM_CLKSEL_PER, 1 << (TimerNumber - 2));
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Library/ResetSystemLib/ |
| ResetSystemLib.c | 135 MmioOr32 (PRM_RSTCTRL, RST_DPLL3);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ |
| RTSM.c | 140 MmioOr32 (SP810_CTRL_BASE, BIT8);
|
| /device/linaro/bootloader/edk2/BeagleBoardPkg/Library/ResetSystemLib/ |
| ResetSystemLib.c | 135 MmioOr32 (PRM_RSTCTRL, RST_DPLL3);
|
