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    Searched refs:mmio_read_32 (Results 1 - 22 of 22) sorted by null

  /device/linaro/bootloader/arm-trusted-firmware/plat/hikey/drivers/
sp804_timer.c 46 data = mmio_read_32(AO_SC_TIMER_EN0);
51 data = mmio_read_32(AO_SC_TIMER_EN0);
54 data = mmio_read_32(AO_SC_PERIPH_CLKSTAT4);
57 data = mmio_read_32(AO_SC_PERIPH_CLKSTAT4);
60 data = mmio_read_32(AO_SC_PERIPH_RSTSTAT4);
63 data = mmio_read_32(AO_SC_PERIPH_RSTSTAT4);
68 data = mmio_read_32(AO_SC_PERIPH_RSTSTAT4);
80 return mmio_read_32(TIMER00_VALUE);
hisi_ipc.c 65 val = mmio_read_32(ACPU_CORE_POWERDOWN_FLAGS_ADDR);
85 val = mmio_read_32(ACPU_CORE_POWERDOWN_FLAGS_ADDR);
107 hs_ctrl = mmio_read_32(HISI_IPC_ACPU_CTRL(signal));
131 val = mmio_read_32(ACPU_CORE_POWERDOWN_FLAGS_ADDR);
161 val = mmio_read_32(ACPU_CLUSTER_POWERDOWN_FLAGS_ADDR);
187 val = mmio_read_32(ACPU_CORE_POWERDOWN_FLAGS_ADDR);
204 val = mmio_read_32(ACPU_CLUSTER_POWERDOWN_FLAGS_ADDR);
hisi_pwrc.c 68 reg = mmio_read_32(ACPU_CTRL_BASE + 0x0E4);
72 reg = mmio_read_32(ACPU_CTRL_BASE + 0x0E4);
100 reg = mmio_read_32(0xF7800000 + 0x004);
dw_mmc.c 75 data = mmio_read_32(MMC0_RINTSTS);
98 data = mmio_read_32(MMC0_CMD);
101 data = mmio_read_32(MMC0_RINTSTS);
126 data = mmio_read_32(MMC0_STATUS);
228 data = mmio_read_32(MMC0_RINTSTS);
235 buf[0] = mmio_read_32(MMC0_RESP0);
237 buf[1] = mmio_read_32(MMC0_RESP1);
238 buf[2] = mmio_read_32(MMC0_RESP2);
239 buf[3] = mmio_read_32(MMC0_RESP3);
282 data = mmio_read_32(MMC0_STATUS)
    [all...]
hisi_mcu.c 178 val = mmio_read_32((SOC_SRAM_M3_BASE_ADDR + 0x200));
194 val = mmio_read_32(AO_SC_SYS_CTRL2);
199 mmio_read_32(AO_SC_SYS_CTRL2));
hisi_dvfs.c 111 reg = mmio_read_32(addr);
121 reg = mmio_read_32(addr);
794 __func__, mmio_read_32(ACPU_CHIP_MAX_FREQ));
  /device/linaro/bootloader/arm-trusted-firmware/plat/hikey/
pll.c 46 data = mmio_read_32((0xf7032000 + 0x000));
51 data = mmio_read_32((0xf7032000 + 0x000));
54 data = mmio_read_32((0xf7800000 + 0x000));
60 data = mmio_read_32((0xf7800000 + 0x014));
65 data = mmio_read_32(PERI_SC_PERIPH_STAT1);
67 data = mmio_read_32(0xf7032000 + 0x050);
72 data = mmio_read_32(PERI_SC_PERIPH_STAT1);
90 data = mmio_read_32((0xf7032000 + 0x110));
94 data = mmio_read_32((0xf7032000 + 0x110));
99 data = mmio_read_32((0xf7032000 + 0x110))
    [all...]
bl31_plat_setup.c 141 data = mmio_read_32(AO_SC_PERIPH_CLKEN4);
153 VERBOSE("EDMAC_AXI_CONF(%d): data:0x%x\n", i, mmio_read_32(EDMAC_AXI_CONF(i)));
155 VERBOSE("EDMAC_AXI_CONF(%d): data:0x%x\n", i, mmio_read_32(EDMAC_AXI_CONF(i)));
usb.c 139 return (mmio_read_32(DSTS) & 2) == 0 ? 1 : 0;
198 data = mmio_read_32(DOEPCTL0);
219 data = mmio_read_32(DIEPCTL(ep));
224 data = mmio_read_32(DOEPCTL(ep));
285 data = mmio_read_32(GINTSTS);
302 data = mmio_read_32(GINTSTS) & GINTSTS_ENUMDONE;
311 data = mmio_read_32(GOTGINT);
334 cfg = mmio_read_32(DCFG);
348 data = mmio_read_32(DIEPCTL(ep)) | DXEPCTL_USBACTEP;
367 data = mmio_read_32(DIEPCTL(ep))
    [all...]
plat_pm.c 235 start = mmio_read_32(TIMER00_VALUE);
237 cnt = mmio_read_32(TIMER00_VALUE);
bl1_plat_setup.c 205 data = mmio_read_32(AO_SC_SYSTEST_SLICER_CNT0);
278 boot_mode = mmio_read_32(ONCHIPROM_PARAM_BASE);
298 data = mmio_read_32(AO_SC_PERIPH_RSTSTAT4);
302 data = mmio_read_32(AO_SC_MCU_SUBSYS_CTRL3);
bl2_plat_setup.c 273 __func__, mmio_read_32(AO_SC_MCU_SUBSYS_STAT2));
276 __func__, mmio_read_32(AO_SC_PERIPH_CLKSTAT4));
  /device/linaro/bootloader/arm-trusted-firmware/include/drivers/arm/
gic_v2.h 194 return mmio_read_32(base + GICD_CTLR);
199 return mmio_read_32(base + GICD_TYPER);
204 return mmio_read_32(base + GICD_SGIR);
229 return mmio_read_32(base + GICC_CTLR);
234 return mmio_read_32(base + GICC_PMR);
239 return mmio_read_32(base + GICC_BPR);
244 return mmio_read_32(base + GICC_IAR);
249 return mmio_read_32(base + GICC_EOIR);
254 return mmio_read_32(base + GICC_HPPIR);
259 return mmio_read_32(base + GICC_AHPPIR)
    [all...]
gic_v3.h 76 return mmio_read_32(base + GICR_WAKER);
  /device/linaro/bootloader/arm-trusted-firmware/plat/juno/
mhu.c 64 while (mmio_read_32(MHU_BASE + CPU_INTR_S_STAT) != 0)
72 while (mmio_read_32(MHU_BASE + CPU_INTR_S_STAT) != 0)
80 while (!(response = mmio_read_32(MHU_BASE + SCP_INTR_S_STAT)))
  /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/
gic_v2.c 44 return mmio_read_32(base + GICD_IGROUPR + (n << 2));
50 return mmio_read_32(base + GICD_ISENABLER + (n << 2));
56 return mmio_read_32(base + GICD_ICENABLER + (n << 2));
62 return mmio_read_32(base + GICD_ISPENDR + (n << 2));
68 return mmio_read_32(base + GICD_ICPENDR + (n << 2));
74 return mmio_read_32(base + GICD_ISACTIVER + (n << 2));
80 return mmio_read_32(base + GICD_ICACTIVER + (n << 2));
86 return mmio_read_32(base + GICD_IPRIORITYR + (n << 2));
92 return mmio_read_32(base + GICD_ITARGETSR + (n << 2));
98 return mmio_read_32(base + GICD_ICFGR + (n << 2))
    [all...]
  /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/cci400/
cci400.c 92 while (mmio_read_32(cci_base_addr + STATUS_REG) & CHANGE_PENDING_BIT)
104 while (mmio_read_32(cci_base_addr + STATUS_REG) & CHANGE_PENDING_BIT)
  /device/linaro/bootloader/arm-trusted-firmware/include/lib/
mmio.h 61 static inline uint32_t mmio_read_32(uintptr_t addr) function
  /device/linaro/bootloader/arm-trusted-firmware/plat/fvp/drivers/pwrc/
fvp_pwrc.c 58 rc = mmio_read_32(PWRC_BASE + PSYSR_OFF);
  /device/linaro/bootloader/arm-trusted-firmware/plat/fvp/aarch64/
fvp_common.c 198 sys_id = mmio_read_32(VE_SYSREGS_BASE + V2M_SYS_ID);
290 counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
  /device/linaro/bootloader/arm-trusted-firmware/plat/juno/aarch64/
juno_common.c 201 counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
  /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/tzc400/
tzc400.c 55 return mmio_read_32(base + BUILD_CONFIG_OFF);
60 return mmio_read_32(base + GATE_KEEPER_OFF);

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