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  /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/
anames.go 33 "BICS",
  /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/
anames.go 33 "BICS",
  /external/llvm/test/MC/ARM/
arm_instructions.s 52 @ CHECK: bics r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1]
53 bics r1,r2,r3
  /external/vixl/test/aarch32/config/
cond-rd-rn-operand-rm-a32.json 47 "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
cond-rd-rn-operand-rm-shift-amount-1to31-a32.json 38 "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
cond-rd-rn-operand-rm-shift-amount-1to31-t32.json 42 "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
cond-rd-rn-operand-rm-shift-amount-1to32-a32.json 38 "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
cond-rd-rn-operand-rm-shift-amount-1to32-t32.json 42 "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
cond-rd-rn-operand-rm-shift-rs-a32.json 36 "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
cond-rd-rn-operand-rm-t32.json 72 "Bics", // BICS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
73 // BICS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
  /device/google/contexthub/firmware/os/cpu/cortexm4/
atomicBitset.c 55 " bics %0, %3 \n"
  /external/valgrind/none/tests/arm/
v6intThumb.stdout.exp 256 BICS-16 0x10E
257 bics r1, r2 :: rd 0x10414807 rm 0x27181728, c:v-in 0, cpsr 0x00000000
258 bics r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
259 bics r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000
260 bics r1, r2 :: rd 0x00000000 rm 0x00000001, c:v-in 0, cpsr 0x40000000 Z
261 bics r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
262 bics r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z
263 bics r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z
264 bics r1, r2 :: rd 0x10414807 rm 0x27181728, c:v-in 1, cpsr 0x10000000 V
265 bics r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
armv1.d 30 0+4c <[^>]*> e1d00000 ? bics r0, r0, r0
thumb32.s 151 arit3 bic bics bic.w bics.w
thumb-eabi.d 40 0+03c <[^>]+> 43bd bics r5, r7
thumb.d 41 0+03c <[^>]+> 43bd bics r5, r7
  /bionic/libc/arch-arm/generic/bionic/
strcmp.S 204 bics r3, r3, #0xff000000
  /bionic/libc/arch-arm64/generic/bionic/
string_copy.S 237 bics has_nul1, tmp1, tmp2
strncmp.S 92 bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */
  /external/llvm/test/CodeGen/ARM/
thumb2-size-opt.ll 34 ; CHECK-OPT: bics r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
shifter_operand.ll 22 ; CHECK-THUMB: bics r0, r1
  /external/v8/src/arm64/
constants-arm64.h 504 BICS = ANDS | NOT
548 BICS_w = LogicalShiftedFixed | BICS,
549 BICS_x = LogicalShiftedFixed | BICS | SixtyFourBits,
    [all...]
  /external/vixl/test/aarch32/
test-assembler-aarch32.cc 967 TEST(bics) {
974 __ Bics(r0, r1, r1);
986 __ Bics(r0, r0, Operand(r1, LSL, 4));
998 __ Bics(r0, r0, Operand(r1, LSR, 4));
1010 __ Bics(r0, r0, Operand(r1, ASR, 4));
1022 __ Bics(r0, r0, Operand(r1, ROR, 1));
1036 __ Bics(r2, r0, Operand(r1, RRX));
1051 __ Bics(r2, r0, Operand(r1, RRX));
1062 __ Bics(r0, r0, 0xf000);
1073 __ Bics(r0, r0, 0x7fffffff)
    [all...]
  /external/valgrind/none/tests/arm64/
integer.stdout.exp     [all...]
  /external/vixl/src/aarch32/
constants-aarch32.cc 66 return "bics";

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