| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/ |
| emit-relocs-312.d | 17 +1001c: f9400445 ldr x5, \[x2.*
|
| erratum843419.d | 21 20001008: 8b050020 add x0, x1, x5
46 3000010: aa0503e0 mov x0, x5
51 300001c: 9b031845 madd x5, x2, x3, x6
|
| /device/linaro/bootloader/arm-trusted-firmware/include/bl31/ |
| context.h | 308 #define set_aapcs_args5(ctx, x0, x1, x2, x3, x4, x5) do { \
309 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X5, x5); \
312 #define set_aapcs_args6(ctx, x0, x1, x2, x3, x4, x5, x6) do { \
314 set_aapcs_args5(ctx, x0, x1, x2, x3, x4, x5); \
316 #define set_aapcs_args7(ctx, x0, x1, x2, x3, x4, x5, x6, x7) do { \
318 set_aapcs_args6(ctx, x0, x1, x2, x3, x4, x5, x6); \
|
| /external/llvm/test/MC/AArch64/ |
| arm64-tls-relocs.s | 54 movz x5, #:tprel_g1:var
57 // CHECK: movz x5, #:tprel_g1:var // encoding: [0bAAA00101,A,0b101AAAAA,0x92]
178 movz x5, #:dtprel_g1:var
181 // CHECK: movz x5, #:dtprel_g1:var // encoding: [0bAAA00101,A,0b101AAAAA,0x92]
292 add x5, x4, #:tlsdesc_lo12:var
300 // CHECK: add x5, x4, :tlsdesc_lo12:var // encoding: [0x85,0bAAAAAA00,0b00AAAAAA,0x91]
|
| basic-a64-instructions.s | 25 add x3, x5, x9, sxtx
33 // CHECK: add x3, x5, x9, sxtx // encoding: [0xa3,0xe0,0x29,0x8b]
71 sub x3, x5, x9, sxtx
79 // CHECK: sub x3, x5, x9, sxtx // encoding: [0xa3,0xe0,0x29,0xcb]
106 adds x3, x5, x9, sxtx #2
114 // CHECK: adds x3, x5, x9, sxtx #2 // encoding: [0xa3,0xe8,0x29,0xab]
141 subs x3, x5, x9, sxtx #2
149 // CHECK: subs x3, x5, x9, sxtx #2 // encoding: [0xa3,0xe8,0x29,0xeb]
176 cmp x5, x9, sxtx #2
184 // CHECK: cmp x5, x9, sxtx #2 // encoding: [0xbf,0xe8,0x29,0xeb
[all...] |
| arm64-aliases.s | 15 mov x5, sp
16 ; CHECK: mov x5, sp
67 cmn x4, x5, uxtx #1
76 ; CHECK: cmn x4, x5, uxtx #1 ; encoding: [0x9f,0x64,0x25,0xab]
89 cmp x4, x5, uxtx
102 ; CHECK: cmp x4, x5, uxtx ; encoding: [0x9f,0x60,0x25,0xeb]
212 orr x5, xzr, #0xfffffffffffffff0
214 orr x5, xzr, #0xfffffffffcffffff
216 orr x5, xzr, #0xffffff00ffffffff
217 orr x5, xzr, #0x8000fffffffffff
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| reloc-insn.s | 68 adr x5,xdata+4088
76 adrp x5,xdata+4088
84 adrp x5,:pg_hi21:xdata+4088
92 add x5,x5,#:lo12:xdata+4088
101 ldrb w5, [x5, #:lo12:xdata+4088]
|
| int-insns.d | 36 64: 91401ca5 add x5, x5, #0x7, lsl #12
38 6c: 91001ca5 add x5, x5, #0x7
64 d4: 92400c85 and x5, x4, #0xf
|
| reloc-insn.d | 54 88: 10000005 adr x5, 0 <xdata>
66 a0: 90000005 adrp x5, 0 <xdata>
78 b8: 90000005 adrp x5, 0 <xdata>
90 d0: 910000a5 add x5, x5, #0x0
103 ec: 394000a5 ldrb w5, \[x5\]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| octeon.d | 29 .*: 71ef2973 cins32 \$15,\$15,0x5,0x5
37 .*: 7339c97b exts32 \$25,\$25,0x5,0x19
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_YuvToRGB.S | 305 * size_t xend); // x5
313 sub x2, x5, x6, LSL #1
335 bic x5, x3, #1
336 add x0, x0, x5, LSL #2
337 add x1, x1, x5
338 add x3, x2, x5
339 sub x2, x4, x5
341 sub x5, sp, #32
344 st1 {v12.1d - v15.1d}, [x5]
361 bic x5, x3, #
[all...] |
| /external/libavc/common/armv8/ |
| ih264_intra_pred_luma_8x8_av8.s | 362 add x5, x5, #4
363 lsr x5, x5, #3
455 sub x5, x3, #4
485 st1 {v5.s}[0], [x1], x5
487 st1 {v18.s}[2], [x1], x5
489 st1 {v16.s}[2], [x1], x5
491 st1 {v14.s}[2], [x1], x5
578 sub x5, x3, #
[all...] |
| ih264_weighted_bi_pred_av8.s | 143 sxtw x5, w5
189 st1 {v4.s}[0], [x2], x5 //store row 1 in destination
190 st1 {v4.s}[1], [x2], x5 //store row 2 in destination
191 st1 {v8.s}[0], [x2], x5 //store row 3 in destination
192 st1 {v8.s}[1], [x2], x5 //store row 4 in destination
234 st1 {v4.8b}, [x2], x5 //store row 1 in destination
235 st1 {v8.8b}, [x2], x5 //store row 2 in destination
237 st1 {v12.8b}, [x2], x5 //store row 3 in destination
238 st1 {v16.8b}, [x2], x5 //store row 4 in destination
306 st1 {v26.8b, v27.8b}, [x2], x5 //store row 1 in destinatio
[all...] |
| /external/pdfium/core/fxge/fontdata/chromefontdata/ |
| FoxitSymbol.cpp | 14 0xd6, 0xfa, 0x86, 0x5, 0x1c, 0x6, 0x3d, 0xf, 0x1c, 0x6, 0x89, 0x11,
152 0x3, 0xa3, 0x3, 0xf5, 0x4, 0x65, 0x4, 0x99, 0x4, 0xf2, 0x5, 0x53,
153 0x5, 0x7a, 0x5, 0xf1, 0x6, 0x56, 0x6, 0x6d, 0x6, 0xd9, 0x6, 0xf0,
181 0x35, 0xd7, 0x36, 0x5, 0x36, 0x21, 0x36, 0x97, 0xfc, 0x45, 0xe, 0xfc,
188 0xe9, 0x7b, 0x15, 0xba, 0x6, 0xa8, 0xf7, 0x64, 0x5, 0xf7, 0x10, 0x6,
189 0x6f, 0xfb, 0x64, 0x5, 0xba, 0x6, 0xa7, 0xf7, 0x64, 0x5, 0xf3, 0x6,
190 0x91, 0xb9, 0x5, 0x24, 0x6, 0xa3, 0xf7, 0x4a, 0x5, 0xf2, 0x6, 0x91
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_sao_edge_offset_class0.s | 146 SUB x5,x9,x8 //wd - col
154 ADD x5,x14,x5 //(ht - row) * src_strd + (wd - col)
158 LDRB w14,[x6,x5] //pu1_src_org[(ht - row) * src_strd + 16 - 1 + (wd - col)]
170 SUB x5,x9,x8 //II wd - col
186 ADD x5,x14,x5 //II (ht - row) * src_strd + (wd - col)
191 LDRB w14,[x6,x5] //II pu1_src_org[(ht - row) * src_strd + 16 - 1 + (wd - col)]
283 SUB x5,x9,#1 //wd - 1
328 ADD x11,x14,x5 //(ht - row) * src_strd + (wd - 1
[all...] |
| ihevc_inter_pred_chroma_horz_w16out.s | 114 mov x16,x5 // ht
138 lsl x5, x10, #1 //2wd
189 mov x10,x5 //2wd
227 sub x20,x5,x3,lsl #1
231 sub x20,x5,x2,lsl #1
258 // sub x20,x12,x5
317 csel x10, x5, x10,eq //2wd
360 // sub x20,x12,x5
362 csel x10, x5, x10,eq //2wd
438 mov x10,x5
[all...] |
| ihevc_weighted_pred_bi_default.s | 105 // x5 => dst_strd
130 mov x16,x5 // dst_strd 44
138 mov x5,x16 //load dst_strd
156 //rsb x6,x6,x5,lsl #2 @4*dst_strd - wd
196 add x14,x2,x5 //pu1_dst_tmp = pu1_dst + dst_strd
216 st1 {v20.s}[1],[x14],x5 //store pu1_dst ii iteration
218 st1 {v30.s}[0],[x14],x5 //store pu1_dst iii iteration //vaddq_s32(i4_tmp2_t1, tmp_lvl_shift_t) iv iteratio
220 st1 {v30.s}[1],[x14],x5 //store pu1_dst iv iteration
230 sub x20,x9,x5,lsl #2 //4*dst_strd - wd
251 add x14,x2,x5 //pu1_dst_tmp = pu1_dst + dst_str
[all...] |
| ihevc_sao_edge_offset_class0_chroma.s | 59 //x5 => *pi1_sao_offset_v
86 mov x16,x5 // *pu1_src_top_right 44
117 MOV x5, x23 //Loads pi1_sao_offset_v
133 LD1 {v0.8b},[x5] //offset_tbl = vld1_s8(pi1_sao_offset_v)
168 SUB x5,x9,x8 //wd - col
182 ADD x5,x14,x5 //(ht - row) * src_strd + (wd - col)
187 LDRH w14,[x6,x5] //pu1_src_org[(ht - row) * src_strd + 14 + (wd - col)]
280 SUB x5,x9,x8 //II wd - col
286 ADD x5,x14,x5 //II (ht - row) * src_strd + (wd - col
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/ |
| crash_reporting.S | 56 .asciz "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\
102 /* Calculate x5 always as it will be clobbered by asm_print_hex */
103 mrs x5, tpidr_el3
104 add x5, x5, #CPU_DATA_CRASH_BUF_SIZE
106 cmp x7, x5
236 stp x4, x5, [x0, #REG_SIZE * 4]
|
| /external/clang/test/FixIt/ |
| fixit.cpp | 79 int x5 != 0; // expected-error {{invalid '!=' at end of declaration; did you mean '='?}} member in namespace:rdar8488464
101 int x5 != 0; // expected-error {{invalid '!=' at end of declaration; did you mean '='?}} local
102 (void)x5;
126 if (int x5 != 0) { (void)x5; } // expected-error {{invalid '!=' at end of declaration; did you mean '='?}}
|
| /external/llvm/test/MC/COFF/ |
| seh-section-2.s | 78 # CHECK: Selection: Associative (0x5)
96 # CHECK: Selection: Associative (0x5)
114 # CHECK: Selection: Associative (0x5)
132 # CHECK: Selection: Associative (0x5)
150 # CHECK: Selection: Associative (0x5)
|
| /external/llvm/test/MC/ARM/ |
| thumb_set.s | 80 @ CHECK: Value: 0x5
86 @ CHECK: Value: 0x5
150 @ CHECK: Value: 0x5
|
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| nv04_state_raster.c | 47 return 0x5;
72 return 0x5;
97 return 0x5;
|
| /external/pdfium/third_party/libtiff/ |
| t4.h | 105 { 8, 0x5, 46 }, /* 0000 0101 */
179 { 6, 0x5, 8 }, /* 0001 01 */
182 { 7, 0x5, 11 }, /* 0000 101 */
|
| /external/strace/xlat/ |
| quotacmds.h | 15 # define Q_V1_SETUSE OLD_CMD(0x5)
66 # define Q_GETINFO NEW_CMD(0x5)
93 # define Q_XGETQSTAT XQM_CMD(0x5)
|
