| /external/llvm/lib/Target/Hexagon/ |
| HexagonBitSimplify.cpp | [all...] |
| HexagonFixupHwLoops.cpp | 190 MIB = BuildMI(*MBB, MII, DL, TII->get(newOp));
|
| HexagonHardwareLoops.cpp | 877 BuildMI(*PH, InsertPos, DL, SubD, SubR);
897 BuildMI(*PH, InsertPos, DL, SubD, SubR);
[all...] |
| HexagonGenPredicate.cpp | 254 BuildMI(B, std::next(DefIt), DL, TII->get(TargetOpcode::COPY), NewPR)
403 MachineInstrBuilder MIB = BuildMI(B, MI, DL, TII->get(NewOpc), NewPR.R);
417 BuildMI(B, MI, DL, TII->get(TargetOpcode::COPY), NewOutR)
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| PHIElimination.cpp | 249 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
265 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
389 NewSrcInstr = BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
398 NewSrcInstr = BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| FPMover.cpp | 120 MI = BuildMI(MBB, I, dl, TM.getInstrInfo()->get(SP::FMOVS), OddDestReg)
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64AdvSIMDScalarPass.cpp | 284 MachineInstrBuilder MIB = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
370 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(NewOpc), Dst)
|
| AArch64ConditionOptimizer.cpp | 269 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc))
281 BuildMI(*MBB, BrMI, BrMI.getDebugLoc(), TII->get(AArch64::Bcc))
|
| AArch64ConditionalCompares.cpp | 595 BuildMI(*Head, Head->end(), TermDL, MCID)
654 BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), MCID)
667 BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), TII->get(AArch64::Bcc))
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 225 MachineInstrBuilder MIB = BuildMI(MBB, *MI, MI->getDebugLoc(), MCID1, TmpReg)
232 MIB = BuildMI(MBB, *MI, MI->getDebugLoc(), MCID2)
|
| ARMLoadStoreOptimizer.cpp | 344 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase)
355 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode))
747 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
902 BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
913 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
918 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
925 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
937 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base)
943 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base)
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.cpp | 300 BuildMI(MBB, II, dl, TII.get(SPU::ILr32), tmpReg )
302 BuildMI(MBB, II, dl, TII.get(newOpcode), MI.getOperand(0).getReg())
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 207 BuildMI(EntryBB, IP, dl, TII.get(PPC::MFVRSAVE), InVRSAVE);
208 BuildMI(EntryBB, IP, dl, TII.get(PPC::UPDATE_VRSAVE),
210 BuildMI(EntryBB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(UpdatedVRSAVE);
224 BuildMI(*BB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(InVRSAVE);
243 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR));
244 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR), GlobalBaseReg);
247 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR8));
248 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR8), GlobalBaseReg);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| ARMConstantIslandPass.cpp | 580 BuildMI(*BB, InsAt, DebugLoc(), TII->get(ARM::CONSTPOOL_ENTRY))
644 MachineInstr *CPEMI = BuildMI(*JumpTableBB, JumpTableBB->begin(),
[all...] |
| Thumb2SizeReduction.cpp | 450 auto MIB = BuildMI(MBB, MI, dl, TII->get(Entry.NarrowOpc1))
553 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, TII->get(Opc));
620 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(),
783 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID);
878 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsConstantIslandPass.cpp | 569 BuildMI(*BB, InsAt, DebugLoc(), TII->get(Mips::CONSTPOOL_ENTRY))
877 BuildMI(OrigBB, DebugLoc(), TII->get(Mips::Bimm16)).addMBB(NewBB);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86FloatingPoint.cpp | 251 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);
260 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);
843 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0);
[all...] |
